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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT
Date: Thu,  3 Oct 2019 13:47:32 +0530	[thread overview]
Message-ID: <20191003081738.22101-1-anshuman.gupta@intel.com> (raw)

Resending this series to test with DC3CO IGT series.
https://patchwork.freedesktop.org/series/66648/

Test-with: <1570088709-3605-2-git-send-email-jeevan.b@intel.com>

Anshuman Gupta (6):
  drm/i915/tgl: Add DC3CO required register and bits
  drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
  drm/i915/tgl: Enable DC3CO state in "DC Off" power well
  drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
  drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
  drm/i915/tgl: Add DC3CO counter in i915_dmc_info

 drivers/gpu/drm/i915/display/intel_ddi.c      |  93 ++++++++++-
 drivers/gpu/drm/i915/display/intel_display.c  |   1 +
 .../drm/i915/display/intel_display_power.c    | 154 ++++++++++++++++--
 .../drm/i915/display/intel_display_power.h    |   3 +
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 114 ++++++++++++-
 drivers/gpu/drm/i915/i915_debugfs.c           |   7 +
 drivers/gpu/drm/i915/i915_drv.h               |   4 +
 drivers/gpu/drm/i915/i915_params.c            |   3 +-
 drivers/gpu/drm/i915/i915_reg.h               |  10 ++
 10 files changed, 371 insertions(+), 19 deletions(-)

-- 
2.21.0

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             reply	other threads:[~2019-10-03  8:23 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-03  8:17 Anshuman Gupta [this message]
2019-10-03  8:17 ` [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
2019-10-04 15:48   ` Ville Syrjälä
2019-10-04 16:40     ` Anshuman Gupta
2019-10-07  9:46   ` Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 2/6] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 3/6] drm/i915/tgl: Enable DC3CO state in "DC Off" power well Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 4/6] drm/i915/tgl: Do modeset to enable and configure DC3CO exitline Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 5/6] drm/i915/tgl: Switch between dc3co and dc5 based on display idleness Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 6/6] drm/i915/tgl: Add DC3CO counter in i915_dmc_info Anshuman Gupta
2019-10-03 10:20 ` ✓ Fi.CI.BAT: success for DC3CO Support for TGL test with DC3CO IGT Patchwork
2019-10-03 16:37 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-07 10:46 ` ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2) Patchwork
2019-10-07 11:02   ` Anshuman Gupta
2019-10-07 13:31     ` Vudum, Lakshminarayana
2019-10-07 15:14 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-07 18:37 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-10-08  8:28   ` Imre Deak
2019-10-08  8:40     ` Gupta, Anshuman
2019-10-08  8:50       ` Vudum, Lakshminarayana

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