From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 10/22] drm/i915/selftests: extend coverage to include LMEM huge-pages
Date: Thu, 3 Oct 2019 20:24:32 +0100 [thread overview]
Message-ID: <20191003192444.10113-11-matthew.auld@intel.com> (raw)
In-Reply-To: <20191003192444.10113-1-matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
.../gpu/drm/i915/gem/selftests/huge_pages.c | 121 +++++++++++++++++-
1 file changed, 120 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index 1772d4cbf3d2..85de3a6fd7a8 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -9,6 +9,7 @@
#include "i915_selftest.h"
#include "gem/i915_gem_region.h"
+#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_pm.h"
#include "gt/intel_gt.h"
@@ -971,7 +972,7 @@ static int gpu_write(struct intel_context *ce,
vma->size >> PAGE_SHIFT, val);
}
-static int cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
+static int __cpu_check_shmem(struct drm_i915_gem_object *obj, u32 dword, u32 val)
{
unsigned int needs_flush;
unsigned long n;
@@ -1003,6 +1004,51 @@ static int cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
return err;
}
+static int __cpu_check_lmem(struct drm_i915_gem_object *obj, u32 dword, u32 val)
+{
+ unsigned long n;
+ int err;
+
+ i915_gem_object_lock(obj);
+ err = i915_gem_object_set_to_wc_domain(obj, false);
+ i915_gem_object_unlock(obj);
+ if (err)
+ return err;
+
+ err = i915_gem_object_pin_pages(obj);
+ if (err)
+ return err;
+
+ for (n = 0; n < obj->base.size >> PAGE_SHIFT; ++n) {
+ u32 __iomem *base;
+ u32 read_val;
+
+ base = i915_gem_object_lmem_io_map_page_atomic(obj, n);
+
+ read_val = ioread32(base + dword);
+ io_mapping_unmap_atomic(base);
+ if (read_val != val) {
+ pr_err("n=%lu base[%u]=%u, val=%u\n",
+ n, dword, read_val, val);
+ err = -EINVAL;
+ break;
+ }
+ }
+
+ i915_gem_object_unpin_pages(obj);
+ return err;
+}
+
+static int cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
+{
+ if (i915_gem_object_has_struct_page(obj))
+ return __cpu_check_shmem(obj, dword, val);
+ else if (i915_gem_object_is_lmem(obj))
+ return __cpu_check_lmem(obj, dword, val);
+
+ return -ENODEV;
+}
+
static int __igt_write_huge(struct intel_context *ce,
struct drm_i915_gem_object *obj,
u64 size, u64 offset,
@@ -1387,6 +1433,78 @@ static int igt_ppgtt_gemfs_huge(void *arg)
return err;
}
+static int igt_ppgtt_lmem_huge(void *arg)
+{
+ struct i915_gem_context *ctx = arg;
+ struct drm_i915_private *i915 = ctx->i915;
+ struct drm_i915_gem_object *obj;
+ static const unsigned int sizes[] = {
+ SZ_64K,
+ SZ_512K,
+ SZ_1M,
+ SZ_2M,
+ };
+ int i;
+ int err;
+
+ if (!HAS_LMEM(i915)) {
+ pr_info("device lacks LMEM support, skipping\n");
+ return 0;
+ }
+
+ /*
+ * Sanity check that the HW uses huge pages correctly through LMEM
+ * -- ensure that our writes land in the right place.
+ */
+
+ for (i = 0; i < ARRAY_SIZE(sizes); ++i) {
+ unsigned int size = sizes[i];
+
+ obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_CONTIGUOUS);
+ if (IS_ERR(obj)) {
+ err = PTR_ERR(obj);
+ if (err == -E2BIG) {
+ pr_info("object too big for region!\n");
+ return 0;
+ }
+
+ return err;
+ }
+
+ err = i915_gem_object_pin_pages(obj);
+ if (err)
+ goto out_put;
+
+ if (obj->mm.page_sizes.phys < I915_GTT_PAGE_SIZE_64K) {
+ pr_info("LMEM unable to allocate huge-page(s) with size=%u\n",
+ size);
+ goto out_unpin;
+ }
+
+ err = igt_write_huge(ctx, obj);
+ if (err) {
+ pr_err("LMEM write-huge failed with size=%u\n", size);
+ goto out_unpin;
+ }
+
+ i915_gem_object_unpin_pages(obj);
+ __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
+ i915_gem_object_put(obj);
+ }
+
+ return 0;
+
+out_unpin:
+ i915_gem_object_unpin_pages(obj);
+out_put:
+ i915_gem_object_put(obj);
+
+ if (err == -ENOMEM)
+ err = 0;
+
+ return err;
+}
+
static int igt_ppgtt_pin_update(void *arg)
{
struct i915_gem_context *ctx = arg;
@@ -1743,6 +1861,7 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_ppgtt_exhaust_huge),
SUBTEST(igt_ppgtt_gemfs_huge),
SUBTEST(igt_ppgtt_internal_huge),
+ SUBTEST(igt_ppgtt_lmem_huge),
};
struct drm_file *file;
struct i915_gem_context *ctx;
--
2.20.1
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next prev parent reply other threads:[~2019-10-03 19:25 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-03 19:24 [PATCH v2 00/22] LMEM basics Matthew Auld
2019-10-03 19:24 ` [PATCH v2 01/22] drm/i915/stolen: make the object creation interface consistent Matthew Auld
2019-10-03 19:29 ` Chris Wilson
2019-10-03 19:24 ` [PATCH v2 02/22] drm/i915: introduce intel_memory_region Matthew Auld
2019-10-03 19:24 ` [PATCH v2 03/22] drm/i915/region: support contiguous allocations Matthew Auld
2019-10-03 19:24 ` [PATCH v2 04/22] drm/i915/region: support volatile objects Matthew Auld
2019-10-03 19:40 ` Chris Wilson
2019-10-03 19:24 ` [PATCH v2 05/22] drm/i915: Add memory region information to device_info Matthew Auld
2019-10-03 19:24 ` [PATCH v2 06/22] drm/i915: support creating LMEM objects Matthew Auld
2019-10-03 19:46 ` Chris Wilson
2019-10-03 19:24 ` [PATCH v2 07/22] drm/i915: setup io-mapping for LMEM Matthew Auld
2019-10-03 19:24 ` [PATCH v2 08/22] drm/i915/lmem: support kernel mapping Matthew Auld
2019-10-03 19:48 ` Chris Wilson
2019-10-03 19:24 ` [PATCH v2 09/22] drm/i915/selftests: add write-dword test for LMEM Matthew Auld
2019-10-03 19:24 ` Matthew Auld [this message]
2019-10-03 19:24 ` [PATCH v2 11/22] drm/i915: enumerate and init each supported region Matthew Auld
2019-10-03 19:24 ` [PATCH v2 12/22] drm/i915: treat shmem as a region Matthew Auld
2019-10-03 19:24 ` [PATCH v2 13/22] drm/i915: treat stolen " Matthew Auld
2019-10-03 19:43 ` Tang, CQ
2019-10-03 19:24 ` [PATCH v2 14/22] drm/i915: define HAS_MAPPABLE_APERTURE Matthew Auld
2019-10-03 19:53 ` Chris Wilson
2019-10-03 19:24 ` [PATCH v2 15/22] drm/i915: do not map aperture if it is not available Matthew Auld
2019-10-03 19:24 ` [PATCH v2 16/22] drm/i915: set num_fence_regs to 0 if there is no aperture Matthew Auld
2019-10-03 19:24 ` [PATCH v2 17/22] drm/i915: error capture with no ggtt slot Matthew Auld
2019-10-03 19:24 ` [PATCH v2 18/22] drm/i915: Don't try to place HWS in non-existing mappable region Matthew Auld
2019-10-03 19:24 ` [PATCH v2 19/22] drm/i915: don't allocate the ring in stolen if we lack aperture Matthew Auld
2019-10-03 19:37 ` Tang, CQ
2019-10-03 19:55 ` Chris Wilson
2019-10-03 19:24 ` [PATCH v2 20/22] drm/i915/selftests: fallback to using the gpu to trash stolen Matthew Auld
2019-10-03 20:02 ` Chris Wilson
2019-10-03 19:24 ` [PATCH v2 21/22] drm/i915/selftests: check for missing aperture Matthew Auld
2019-10-03 19:24 ` [PATCH v2 22/22] HAX drm/i915: add the fake lmem region Matthew Auld
2019-10-03 22:11 ` ✗ Fi.CI.CHECKPATCH: warning for LMEM basics (rev2) Patchwork
2019-10-03 22:21 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-10-03 22:34 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-04 11:34 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-10-04 12:06 ` Kai Vehmanen
2019-10-04 12:08 ` Chris Wilson
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