From: Thierry Reding <thierry.reding@gmail.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org,
coverity-bot <keescook+coverity-bot@chromium.org>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] drm/dp: Increase link status size
Date: Tue, 29 Oct 2019 15:07:25 +0100 [thread overview]
Message-ID: <20191029140725.GK508460@ulmo> (raw)
In-Reply-To: <875zk7ad8m.fsf@intel.com>
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On Tue, Oct 29, 2019 at 03:32:41PM +0200, Jani Nikula wrote:
> On Tue, 29 Oct 2019, Thierry Reding <thierry.reding@gmail.com> wrote:
> > From: Thierry Reding <treding@nvidia.com>
> >
> > The current link status contains bytes 0x202 through 0x207, but we also
> > want to make sure to include the DP_ADJUST_REQUEST_POST_CURSOR2 (0x20c)
> > so that the post-cursor adjustment can be queried during link training.
>
> We don't currently use this in i915 (we probably should), so the impact
> here is that we'll just read more DPCD than before. I quickly perused
> i915, and this does not appear to directly break anything. I think the
> change is probably fine, but at the same time it freaks me out a bit...
>
> If you don't mind, please resend this with Cc:
> intel-gfx@lists.freedesktop.org to have our CI crunch through it across
> a number of platforms. Would give me a warm fuzzy feeling. :)
>
> With the caveat that I didn't look at any other drivers besides i915,
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Done, thanks.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org,
coverity-bot <keescook+coverity-bot@chromium.org>,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/dp: Increase link status size
Date: Tue, 29 Oct 2019 15:07:25 +0100 [thread overview]
Message-ID: <20191029140725.GK508460@ulmo> (raw)
Message-ID: <20191029140725.qfZJfKusoGmnTaMe4gSp1neG2Wh6wE7HxEm6A07zCq8@z> (raw)
In-Reply-To: <875zk7ad8m.fsf@intel.com>
[-- Attachment #1.1: Type: text/plain, Size: 1074 bytes --]
On Tue, Oct 29, 2019 at 03:32:41PM +0200, Jani Nikula wrote:
> On Tue, 29 Oct 2019, Thierry Reding <thierry.reding@gmail.com> wrote:
> > From: Thierry Reding <treding@nvidia.com>
> >
> > The current link status contains bytes 0x202 through 0x207, but we also
> > want to make sure to include the DP_ADJUST_REQUEST_POST_CURSOR2 (0x20c)
> > so that the post-cursor adjustment can be queried during link training.
>
> We don't currently use this in i915 (we probably should), so the impact
> here is that we'll just read more DPCD than before. I quickly perused
> i915, and this does not appear to directly break anything. I think the
> change is probably fine, but at the same time it freaks me out a bit...
>
> If you don't mind, please resend this with Cc:
> intel-gfx@lists.freedesktop.org to have our CI crunch through it across
> a number of platforms. Would give me a warm fuzzy feeling. :)
>
> With the caveat that I didn't look at any other drivers besides i915,
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Done, thanks.
Thierry
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-29 14:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20191029111006.358963-1-thierry.reding@gmail.com>
2019-10-29 13:32 ` [PATCH] drm/dp: Increase link status size Jani Nikula
2019-10-29 13:32 ` [Intel-gfx] " Jani Nikula
2019-10-29 14:07 ` Thierry Reding [this message]
2019-10-29 14:07 ` Thierry Reding
2019-10-29 15:18 ` Ville Syrjälä
2019-10-29 15:18 ` Ville Syrjälä
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