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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/2] drm/i915/tgl: Add SFC instdone to error state
Date: Tue, 29 Oct 2019 18:38:40 +0200	[thread overview]
Message-ID: <20191029163841.5224-1-mika.kuoppala@linux.intel.com> (raw)

On debugging media workload hangs, sfc instdone
might prove useful in future. Be prepared.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 15 +++++++++++++++
 drivers/gpu/drm/i915/i915_gpu_error.h |  1 +
 drivers/gpu/drm/i915/i915_reg.h       |  3 +++
 3 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 7672d4c4552f..8298e7ca2f71 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -740,6 +740,14 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
 	if (IS_GEN(m->i915, 12))
 		err_printf(m, "AUX_ERR_DBG: 0x%08x\n", error->aux_err);
 
+	if (INTEL_GEN(m->i915) >= 12) {
+		int i;
+
+		for (i = 0; i < GEN12_SFC_DONE_MAX; i++)
+			err_printf(m, "  SFC_DONE[%d]: 0x%08x\n", i,
+				   error->sfc_done[i]);
+	}
+
 	for (ee = error->engine; ee; ee = ee->next)
 		error_print_engine(m, ee, error->capture);
 
@@ -1599,6 +1607,13 @@ static void capture_reg_state(struct i915_gpu_state *error)
 	if (IS_GEN(i915, 12))
 		error->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG);
 
+	if (INTEL_GEN(i915) >= 12) {
+		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
+			error->sfc_done[i] =
+				intel_uncore_read(uncore, GEN12_SFC_DONE(i));
+		}
+	}
+
 	/* 4: Everything else */
 	if (INTEL_GEN(i915) >= 11) {
 		error->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER);
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h
index c7f36be2a38e..0fede700e920 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -75,6 +75,7 @@ struct i915_gpu_state {
 	u32 gfx_mode;
 	u32 gtt_cache;
 	u32 aux_err; /* gen12 */
+	u32 sfc_done[GEN12_SFC_DONE_MAX]; /* gen12 */
 
 	u32 nfence;
 	u64 fence[I915_MAX_NUM_FENCES];
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 42d2c0b08eff..b8fb793a3018 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -413,6 +413,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN11_VECS_SFC_USAGE(engine)		_MMIO((engine)->mmio_base + 0x2014)
 #define   GEN11_VECS_SFC_USAGE_BIT		(1 << 0)
 
+#define GEN12_SFC_DONE(n)		_MMIO(0x1cc00 + (n) * 0x100)
+#define GEN12_SFC_DONE_MAX		4
+
 #define RING_PP_DIR_BASE(base)		_MMIO((base) + 0x228)
 #define RING_PP_DIR_BASE_READ(base)	_MMIO((base) + 0x518)
 #define RING_PP_DIR_DCLV(base)		_MMIO((base) + 0x220)
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Add SFC instdone to error state
Date: Tue, 29 Oct 2019 18:38:40 +0200	[thread overview]
Message-ID: <20191029163841.5224-1-mika.kuoppala@linux.intel.com> (raw)
Message-ID: <20191029163840.b3YWiiq-zIYaWwIizWiImtUh8wTlNeQUkTFhtXVofcQ@z> (raw)

On debugging media workload hangs, sfc instdone
might prove useful in future. Be prepared.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 15 +++++++++++++++
 drivers/gpu/drm/i915/i915_gpu_error.h |  1 +
 drivers/gpu/drm/i915/i915_reg.h       |  3 +++
 3 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 7672d4c4552f..8298e7ca2f71 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -740,6 +740,14 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
 	if (IS_GEN(m->i915, 12))
 		err_printf(m, "AUX_ERR_DBG: 0x%08x\n", error->aux_err);
 
+	if (INTEL_GEN(m->i915) >= 12) {
+		int i;
+
+		for (i = 0; i < GEN12_SFC_DONE_MAX; i++)
+			err_printf(m, "  SFC_DONE[%d]: 0x%08x\n", i,
+				   error->sfc_done[i]);
+	}
+
 	for (ee = error->engine; ee; ee = ee->next)
 		error_print_engine(m, ee, error->capture);
 
@@ -1599,6 +1607,13 @@ static void capture_reg_state(struct i915_gpu_state *error)
 	if (IS_GEN(i915, 12))
 		error->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG);
 
+	if (INTEL_GEN(i915) >= 12) {
+		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
+			error->sfc_done[i] =
+				intel_uncore_read(uncore, GEN12_SFC_DONE(i));
+		}
+	}
+
 	/* 4: Everything else */
 	if (INTEL_GEN(i915) >= 11) {
 		error->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER);
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h
index c7f36be2a38e..0fede700e920 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -75,6 +75,7 @@ struct i915_gpu_state {
 	u32 gfx_mode;
 	u32 gtt_cache;
 	u32 aux_err; /* gen12 */
+	u32 sfc_done[GEN12_SFC_DONE_MAX]; /* gen12 */
 
 	u32 nfence;
 	u64 fence[I915_MAX_NUM_FENCES];
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 42d2c0b08eff..b8fb793a3018 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -413,6 +413,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN11_VECS_SFC_USAGE(engine)		_MMIO((engine)->mmio_base + 0x2014)
 #define   GEN11_VECS_SFC_USAGE_BIT		(1 << 0)
 
+#define GEN12_SFC_DONE(n)		_MMIO(0x1cc00 + (n) * 0x100)
+#define GEN12_SFC_DONE_MAX		4
+
 #define RING_PP_DIR_BASE(base)		_MMIO((base) + 0x228)
 #define RING_PP_DIR_BASE_READ(base)	_MMIO((base) + 0x518)
 #define RING_PP_DIR_DCLV(base)		_MMIO((base) + 0x220)
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2019-10-29 16:38 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-29 16:38 Mika Kuoppala [this message]
2019-10-29 16:38 ` [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Add SFC instdone to error state Mika Kuoppala
2019-10-29 16:38 ` [PATCH 2/2] drm/i915/tgl: Add gam instdone Mika Kuoppala
2019-10-29 16:38   ` [Intel-gfx] " Mika Kuoppala
2019-10-29 16:45   ` Chris Wilson
2019-10-29 16:45     ` [Intel-gfx] " Chris Wilson
2019-10-30  1:15 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/tgl: Add SFC instdone to error state Patchwork
2019-10-30  1:15   ` [Intel-gfx] " Patchwork
2019-10-31  2:48 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-31  2:48   ` [Intel-gfx] " Patchwork

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