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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915: Restore GT coarse power gating workaround
Date: Thu, 14 Nov 2019 17:26:21 +0200	[thread overview]
Message-ID: <20191114152621.7235-1-imre.deak@intel.com> (raw)

The workaround to disable coarse power gating is still needed on SKL
GT3/GT4 machines and since the RC6 context corruption was discovered by
the hardware team also on all GEN9 machines. Restore applying the
workaround.

Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/intel_gt_pm_late_selftests/live_rc6_ctx
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_rc6.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index f7c0baeb3793..de2d302e8d55 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -175,8 +175,10 @@ static void gen9_rc6_enable(struct intel_rc6 *rc6)
 	    GEN6_RC_CTL_RC6_ENABLE |
 	    rc6_mode);
 
-	set(uncore, GEN9_PG_ENABLE,
-	    GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
+	/* WaRsDisableCoarsePowerGating:skl,cnl - Render/Media PG need to be disabled with RC6. */
+	if (!NEEDS_WaRsDisableCoarsePowerGating(rc6_to_i915(rc6)))
+		set(uncore, GEN9_PG_ENABLE,
+		    GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
 }
 
 static void gen8_rc6_enable(struct intel_rc6 *rc6)
-- 
2.17.1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915: Restore GT coarse power gating workaround
Date: Thu, 14 Nov 2019 17:26:21 +0200	[thread overview]
Message-ID: <20191114152621.7235-1-imre.deak@intel.com> (raw)
Message-ID: <20191114152621.-hypf0UoCpuQL7Qmk-xBt0oWw40OaFUKNAprymMAFOU@z> (raw)

The workaround to disable coarse power gating is still needed on SKL
GT3/GT4 machines and since the RC6 context corruption was discovered by
the hardware team also on all GEN9 machines. Restore applying the
workaround.

Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/intel_gt_pm_late_selftests/live_rc6_ctx
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_rc6.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index f7c0baeb3793..de2d302e8d55 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -175,8 +175,10 @@ static void gen9_rc6_enable(struct intel_rc6 *rc6)
 	    GEN6_RC_CTL_RC6_ENABLE |
 	    rc6_mode);
 
-	set(uncore, GEN9_PG_ENABLE,
-	    GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
+	/* WaRsDisableCoarsePowerGating:skl,cnl - Render/Media PG need to be disabled with RC6. */
+	if (!NEEDS_WaRsDisableCoarsePowerGating(rc6_to_i915(rc6)))
+		set(uncore, GEN9_PG_ENABLE,
+		    GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
 }
 
 static void gen8_rc6_enable(struct intel_rc6 *rc6)
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2019-11-14 15:28 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-14 15:26 Imre Deak [this message]
2019-11-14 15:26 ` [Intel-gfx] [PATCH] drm/i915: Restore GT coarse power gating workaround Imre Deak
2019-11-14 15:43 ` Chris Wilson
2019-11-14 15:43   ` [Intel-gfx] " Chris Wilson
2019-11-14 15:55   ` Imre Deak
2019-11-14 15:55     ` [Intel-gfx] " Imre Deak
2019-11-14 16:17 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-11-14 16:17   ` [Intel-gfx] " Patchwork
2019-11-14 17:04 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-14 17:04   ` [Intel-gfx] " Patchwork
2019-11-15 13:20 ` [PATCH] " Andi Shyti
2019-11-15 13:20   ` [Intel-gfx] " Andi Shyti
2019-11-15 15:47 ` ✓ Fi.CI.IGT: success for " Patchwork
2019-11-15 15:47   ` [Intel-gfx] " Patchwork

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