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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 4/7] drm/i915/dp: Power down sink before disable pipe/transcoder clock
Date: Tue, 26 Nov 2019 22:15:06 +0200	[thread overview]
Message-ID: <20191126201506.GH1208@intel.com> (raw)
In-Reply-To: <20191123005459.155383-4-jose.souza@intel.com>

On Fri, Nov 22, 2019 at 04:54:56PM -0800, José Roberto de Souza wrote:
> Disabling pipe/transcoder clock before power down sink could cause
> sink lost signal, causing it to trigger a hotplug to notify source
> that link signal was lost.
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index d2f0d393d3ee..7d3a6e3c7f57 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3808,12 +3808,12 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
>  	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>  
>  	if (!is_mst) {
> -		intel_ddi_disable_pipe_clock(old_crtc_state);
>  		/*
>  		 * Power down sink before disabling the port, otherwise we end
>  		 * up getting interrupts from the sink on detecting link loss.
>  		 */
>  		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
> +		intel_ddi_disable_pipe_clock(old_crtc_state);
>  	}

The spec seems to say that we should do this after turning off
DDI_BUF_CTL on tgl+.

>  
>  	intel_disable_ddi_buf(encoder, old_crtc_state);
> -- 
> 2.24.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 4/7] drm/i915/dp: Power down sink before disable pipe/transcoder clock
Date: Tue, 26 Nov 2019 22:15:06 +0200	[thread overview]
Message-ID: <20191126201506.GH1208@intel.com> (raw)
Message-ID: <20191126201506.zv5iaQDke_Y0518bsjyrWi8Cd0Kkam180wmzeoHjH9o@z> (raw)
In-Reply-To: <20191123005459.155383-4-jose.souza@intel.com>

On Fri, Nov 22, 2019 at 04:54:56PM -0800, José Roberto de Souza wrote:
> Disabling pipe/transcoder clock before power down sink could cause
> sink lost signal, causing it to trigger a hotplug to notify source
> that link signal was lost.
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index d2f0d393d3ee..7d3a6e3c7f57 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3808,12 +3808,12 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
>  	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>  
>  	if (!is_mst) {
> -		intel_ddi_disable_pipe_clock(old_crtc_state);
>  		/*
>  		 * Power down sink before disabling the port, otherwise we end
>  		 * up getting interrupts from the sink on detecting link loss.
>  		 */
>  		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
> +		intel_ddi_disable_pipe_clock(old_crtc_state);
>  	}

The spec seems to say that we should do this after turning off
DDI_BUF_CTL on tgl+.

>  
>  	intel_disable_ddi_buf(encoder, old_crtc_state);
> -- 
> 2.24.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-11-26 20:15 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-23  0:54 [PATCH 1/7] drm/i915/display: Refactor intel_commit_modeset_disables() José Roberto de Souza
2019-11-23  0:54 ` [Intel-gfx] " José Roberto de Souza
2019-11-23  0:54 ` [PATCH 2/7] drm/i915/display: Check the old state to find port sync slave José Roberto de Souza
2019-11-23  0:54   ` [Intel-gfx] " José Roberto de Souza
2019-11-26 19:41   ` Ville Syrjälä
2019-11-26 19:41     ` [Intel-gfx] " Ville Syrjälä
2019-11-23  0:54 ` [PATCH 3/7] drm/i915/tgl: Select master trasconder for MST stream José Roberto de Souza
2019-11-23  0:54   ` [Intel-gfx] " José Roberto de Souza
2019-11-26 20:05   ` Ville Syrjälä
2019-11-26 20:05     ` [Intel-gfx] " Ville Syrjälä
2019-11-26 20:30     ` Souza, Jose
2019-11-26 20:30       ` [Intel-gfx] " Souza, Jose
2019-11-27 19:59       ` Ville Syrjälä
2019-11-27 19:59         ` [Intel-gfx] " Ville Syrjälä
2019-11-28  1:14         ` Souza, Jose
2019-11-28  1:14           ` [Intel-gfx] " Souza, Jose
2019-11-28 12:06           ` Ville Syrjälä
2019-11-28 12:06             ` [Intel-gfx] " Ville Syrjälä
2019-12-02 22:03             ` Souza, Jose
2019-12-02 22:03               ` [Intel-gfx] " Souza, Jose
2019-12-03 12:47               ` Ville Syrjälä
2019-12-03 22:12                 ` Souza, Jose
2019-12-04 10:55                   ` Ville Syrjälä
2019-12-04 18:48                     ` Souza, Jose
2019-12-04 19:03                       ` Ville Syrjälä
2019-11-23  0:54 ` [PATCH 4/7] drm/i915/dp: Power down sink before disable pipe/transcoder clock José Roberto de Souza
2019-11-23  0:54   ` [Intel-gfx] " José Roberto de Souza
2019-11-26 20:15   ` Ville Syrjälä [this message]
2019-11-26 20:15     ` Ville Syrjälä
2019-11-26 22:12     ` Souza, Jose
2019-11-26 22:12       ` [Intel-gfx] " Souza, Jose
2019-11-27 19:24       ` Ville Syrjälä
2019-11-27 19:24         ` [Intel-gfx] " Ville Syrjälä
2019-11-28  1:08         ` Souza, Jose
2019-11-28  1:08           ` [Intel-gfx] " Souza, Jose
2019-11-28 18:30           ` Ville Syrjälä
2019-11-28 18:30             ` [Intel-gfx] " Ville Syrjälä
2019-11-23  0:54 ` [PATCH 5/7] drm/i915/display/mst: Move DPMS_OFF call to post_disable José Roberto de Souza
2019-11-23  0:54   ` [Intel-gfx] " José Roberto de Souza
2019-11-28 18:31   ` Ville Syrjälä
2019-11-28 18:31     ` [Intel-gfx] " Ville Syrjälä
2019-11-23  0:54 ` [PATCH 6/7] drm/i915/display/tgl: Fix the order of the step to turn transcoder clock off José Roberto de Souza
2019-11-23  0:54   ` [Intel-gfx] " José Roberto de Souza
2019-11-28 18:40   ` Ville Syrjälä
2019-11-28 18:40     ` [Intel-gfx] " Ville Syrjälä
2019-12-03 23:29     ` Souza, Jose
2019-12-04 10:56       ` Ville Syrjälä
2019-11-23  0:54 ` [PATCH 7/7] drm/display/dp: Fix MST disable sequences José Roberto de Souza
2019-11-23  0:54   ` [Intel-gfx] " José Roberto de Souza
2019-11-23  1:28 ` ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915/display: Refactor intel_commit_modeset_disables() Patchwork
2019-11-23  1:28   ` [Intel-gfx] " Patchwork
2019-11-24  7:11 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-24  7:11   ` [Intel-gfx] " Patchwork
2019-11-26 19:40 ` [PATCH 1/7] " Ville Syrjälä
2019-11-26 19:40   ` [Intel-gfx] " Ville Syrjälä
2019-11-26 22:03   ` Souza, Jose
2019-11-26 22:03     ` [Intel-gfx] " Souza, Jose
2019-11-26 22:49     ` Matt Roper
2019-11-26 22:49       ` [Intel-gfx] " Matt Roper
2019-11-26 23:03       ` Souza, Jose
2019-11-26 23:03         ` [Intel-gfx] " Souza, Jose
2019-11-27 18:49       ` Lucas De Marchi
2019-11-27 18:49         ` [Intel-gfx] " Lucas De Marchi
2019-11-27 19:11     ` Ville Syrjälä
2019-11-27 19:11       ` [Intel-gfx] " Ville Syrjälä

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