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* [Intel-gfx] [PATCH 1/5] drm/i915: Call hsw_fdi_link_train() directly()
@ 2019-12-13 19:52 Ville Syrjala
  2019-12-13 19:52 ` [Intel-gfx] [PATCH 2/5] drm/i915: Nuke .post_pll_disable() for DDI platforms Ville Syrjala
                   ` (7 more replies)
  0 siblings, 8 replies; 15+ messages in thread
From: Ville Syrjala @ 2019-12-13 19:52 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Remove the pointless vfunc detour for hsw_fdi_link_train()
and just call it directly. Also pass the encoder in so we
can nuke the silly encoder loop within.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_crt.c     |  2 +-
 drivers/gpu/drm/i915/display/intel_ddi.c     | 12 ++++--------
 drivers/gpu/drm/i915/display/intel_ddi.h     |  2 +-
 drivers/gpu/drm/i915/display/intel_display.c |  2 --
 4 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 7a2d36905155..50624b8f064d 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -278,7 +278,7 @@ static void hsw_pre_enable_crt(struct intel_encoder *encoder,
 
 	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
 
-	dev_priv->display.fdi_link_train(crtc, crtc_state);
+	hsw_fdi_link_train(encoder, crtc_state);
 
 	intel_ddi_enable_pipe_clock(crtc_state);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5b6f32517c75..94f8bc4cd335 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1107,18 +1107,14 @@ static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder,
  * DDI A (which is used for eDP)
  */
 
-void hsw_fdi_link_train(struct intel_crtc *crtc,
+void hsw_fdi_link_train(struct intel_encoder *encoder,
 			const struct intel_crtc_state *crtc_state)
 {
-	struct drm_device *dev = crtc->base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct intel_encoder *encoder;
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	u32 temp, i, rx_ctl_val, ddi_pll_sel;
 
-	for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
-		WARN_ON(encoder->type != INTEL_OUTPUT_ANALOG);
-		intel_prepare_dp_ddi_buffers(encoder, crtc_state);
-	}
+	intel_prepare_dp_ddi_buffers(encoder, crtc_state);
 
 	/* Set the FDI_RX_MISC pwrdn lanes and the 2 workarounds listed at the
 	 * mode set "sequence for CRT port" document:
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 19aeab1246ee..167c6579d972 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -22,7 +22,7 @@ struct intel_encoder;
 void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder,
 				const struct intel_crtc_state *old_crtc_state,
 				const struct drm_connector_state *old_conn_state);
-void hsw_fdi_link_train(struct intel_crtc *crtc,
+void hsw_fdi_link_train(struct intel_encoder *encoder,
 			const struct intel_crtc_state *crtc_state);
 void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
 bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0f37f1d2026d..8aed67d2c105 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16673,8 +16673,6 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
 	} else if (IS_IVYBRIDGE(dev_priv)) {
 		/* FIXME: detect B0+ stepping and use auto training */
 		dev_priv->display.fdi_link_train = ivb_manual_fdi_link_train;
-	} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
-		dev_priv->display.fdi_link_train = hsw_fdi_link_train;
 	}
 
 	if (INTEL_GEN(dev_priv) >= 9)
-- 
2.23.0

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^ permalink raw reply related	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2019-12-17 17:33 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-12-13 19:52 [Intel-gfx] [PATCH 1/5] drm/i915: Call hsw_fdi_link_train() directly() Ville Syrjala
2019-12-13 19:52 ` [Intel-gfx] [PATCH 2/5] drm/i915: Nuke .post_pll_disable() for DDI platforms Ville Syrjala
2019-12-16 20:42   ` Souza, Jose
2019-12-13 19:52 ` [Intel-gfx] [PATCH 3/5] drm/i915: Pass old crtc state to skylake_scaler_disable() Ville Syrjala
2019-12-16 22:01   ` Souza, Jose
2019-12-13 19:52 ` [Intel-gfx] [PATCH 4/5] drm/i915: Pass old crtc state to intel_crtc_vblank_off() Ville Syrjala
2019-12-16 22:01   ` Souza, Jose
2019-12-13 19:52 ` [Intel-gfx] [PATCH 5/5] drm/i915: Move stuff from haswell_crtc_disable() into encoder .post_disable() Ville Syrjala
2019-12-17 17:33   ` Souza, Jose
2019-12-14  1:32 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/5] drm/i915: Call hsw_fdi_link_train() directly() Patchwork
2019-12-16 17:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Call hsw_fdi_link_train() directly() (rev2) Patchwork
2019-12-16 20:37 ` [Intel-gfx] [PATCH 1/5] drm/i915: Call hsw_fdi_link_train() directly() Souza, Jose
2019-12-16 20:50   ` Ville Syrjälä
2019-12-16 22:10     ` Souza, Jose
2019-12-16 22:34 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Call hsw_fdi_link_train() directly() (rev2) Patchwork

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