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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Lock gmbus/aux mutexes while changing cdclk
Date: Fri, 28 Feb 2020 15:37:56 +0200	[thread overview]
Message-ID: <20200228133756.GC13686@intel.com> (raw)
In-Reply-To: <158287851663.19174.2013462831358055362@skylake-alporthouse-com>

On Fri, Feb 28, 2020 at 08:28:36AM +0000, Chris Wilson wrote:
> Quoting Ville Syrjala (2020-02-27 19:39:54)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > gmbus/aux may be clocked by cdclk, thus we should make sure no
> > transfers are ongoing while the cdclk frequency is being changed.
> > We do that by simply grabbing all the gmbus/aux mutexes. No one
> > else should be holding any more than one of those at a time so
> > the lock ordering here shouldn't matter.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_cdclk.c | 23 ++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 0741d643455b..f69bf4a4eb1c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -1868,6 +1868,9 @@ static void intel_set_cdclk(struct drm_i915_private *dev_priv,
> >                             const struct intel_cdclk_config *cdclk_config,
> >                             enum pipe pipe)
> >  {
> > +       struct intel_encoder *encoder;
> > +       unsigned int aux_mutex_lockclass = 0;
> > +
> >         if (!intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_config))
> >                 return;
> >  
> > @@ -1876,8 +1879,28 @@ static void intel_set_cdclk(struct drm_i915_private *dev_priv,
> >  
> >         intel_dump_cdclk_config(cdclk_config, "Changing CDCLK to");
> >  
> > +       /*
> > +        * Lock aux/gmbus while we change cdclk in case those
> > +        * functions use cdclk. Not all platforms/ports do,
> > +        * but we'll lock them all for simplicity.
> > +        */
> > +       mutex_lock(&dev_priv->gmbus_mutex);
> > +       for_each_intel_dp(&dev_priv->drm, encoder) {
> > +               struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > +
> > +               mutex_lock_nested(&intel_dp->aux.hw_mutex,
> > +                                 aux_mutex_lockclass++);
> 
> mutex_lock_nest_lock(&intel_dp->aux.hw_mutex, &dev_priv->gmbus_mutex);
> ?

That does seems to work. Not sure what it means though since no docs
and I was too lazy to read the code. Does it say "as long as we hold
nest_lock the order doesn't matter"?

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2020-02-28 13:38 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-27 19:39 [Intel-gfx] [PATCH] drm/i915: Lock gmbus/aux mutexes while changing cdclk Ville Syrjala
2020-02-28  1:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-02-28  8:28 ` [Intel-gfx] [PATCH] " Chris Wilson
2020-02-28 13:37   ` Ville Syrjälä [this message]
2020-02-28 13:45     ` Chris Wilson
2020-02-28  9:06 ` Jani Nikula
2020-02-28 11:10   ` Ville Syrjälä
2020-02-28 14:10     ` Ville Syrjälä
2020-03-02 17:47       ` Ville Syrjälä
2020-02-29 10:06 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
2020-03-02 17:44 ` [Intel-gfx] [PATCH v2] " Ville Syrjala
2020-03-03  9:11   ` Jani Nikula
2020-03-02 19:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Lock gmbus/aux mutexes while changing cdclk (rev2) Patchwork
2020-03-02 19:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-03  8:20 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-03  8:22   ` Chris Wilson

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