From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Sharma, Swati2" <swati2.sharma@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 2/9] drm/i915: Clean up i9xx_load_luts_internal()
Date: Fri, 6 Mar 2020 16:46:24 +0200 [thread overview]
Message-ID: <20200306144624.GS13686@intel.com> (raw)
In-Reply-To: <7c3a6b6b-9bf3-73a4-46de-de9c3a3a0429@intel.com>
On Fri, Mar 06, 2020 at 08:12:22PM +0530, Sharma, Swati2 wrote:
>
>
> On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
> > +static void i9xx_load_luts(const struct intel_crtc_state *crtc_state)
> > +{
> > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > + const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut;
> > +
> > + assert_pll_enabled(dev_priv, crtc->pipe);
> Just a query:
> Why won't we have following condition here?
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
> assert_dsi_pll_enabled(dev_priv);
> or is it applicable only for i965_load_luts() and not for i9xx_load_luts()?
No DSI on these platforms. Only VLV/CHV can have it, and they use
i965_load_luts().
>
> > +
> > + i9xx_load_lut_8(crtc, gamma_lut);
> > +}
> > +
> The patch looks good to me.
>
> Reviewed-by: Swati Sharma <swati2.sharma@intel.com>
>
> --
> ~Swati Sharma
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-03-06 14:46 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-03 17:33 [Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups Ville Syrjala
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Polish CHV CGM CSC loading Ville Syrjala
2020-03-06 8:44 ` Sharma, Swati2
2020-03-06 11:49 ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Clean up i9xx_load_luts_internal() Ville Syrjala
2020-03-06 14:42 ` Sharma, Swati2
2020-03-06 14:46 ` Ville Syrjälä [this message]
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants Ville Syrjala
2020-03-04 2:54 ` kbuild test robot
2020-03-04 11:51 ` Ville Syrjälä
2020-03-06 15:00 ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: s/blob_data/lut/ Ville Syrjala
2020-03-06 15:03 ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/ Ville Syrjala
2020-03-06 15:18 ` Sharma, Swati2
2020-03-06 15:32 ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Clean up integer types in color code Ville Syrjala
2020-03-06 15:24 ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Refactor LUT read functions Ville Syrjala
2020-03-06 15:28 ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Fix readout of PIPEGCMAX Ville Syrjala
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Pass the crtc to the low level read_lut() funcs Ville Syrjala
2020-03-06 15:36 ` Sharma, Swati2
2020-03-03 19:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev3) Patchwork
2020-03-03 19:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-03 20:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-06 15:40 ` [Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups Sharma, Swati2
2020-03-09 20:26 ` Ville Syrjälä
2020-03-07 0:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev4) Patchwork
2020-03-07 0:27 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-07 0:45 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-09 13:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-09 19:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-09 19:46 ` Patchwork
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