Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 8/8] drm/i915/tc: Do not warn when aux power well of static TC ports timeout
Date: Mon,  6 Apr 2020 18:11:57 -0700	[thread overview]
Message-ID: <20200407011157.362092-8-jose.souza@intel.com> (raw)
In-Reply-To: <20200407011157.362092-1-jose.souza@intel.com>

This is a expected timeout of static TC ports not conneceted, so
not throwing warnings that would taint CI.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 .../drm/i915/display/intel_display_power.c    | 37 +++++++++++--------
 1 file changed, 21 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 5d33929f3724..50af5854658e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -284,6 +284,21 @@ static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv,
 		gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);
 }
 
+#define ICL_AUX_PW_TO_CH(pw_idx)	\
+	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
+
+#define ICL_TBT_AUX_PW_TO_CH(pw_idx)	\
+	((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C)
+
+static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private *dev_priv,
+				     struct i915_power_well *power_well)
+{
+	int pw_idx = power_well->desc->hsw.idx;
+
+	return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) :
+						 ICL_AUX_PW_TO_CH(pw_idx);
+}
+
 static struct intel_digital_port *
 aux_ch_to_digital_port(struct drm_i915_private *dev_priv,
 		       enum aux_ch aux_ch)
@@ -320,11 +335,16 @@ static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
 	/* Timeout for PW1:10 us, AUX:not specified, other PWs:20 us. */
 	if (intel_de_wait_for_set(dev_priv, regs->driver,
 				  HSW_PWR_WELL_CTL_STATE(pw_idx), 1)) {
+		enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
+		struct intel_digital_port *dig_port = aux_ch_to_digital_port(dev_priv, aux_ch);
+
 		drm_dbg_kms(&dev_priv->drm, "%s power well enable timeout\n",
 			    power_well->desc->name);
 
 		/* An AUX timeout is expected if the TBT DP tunnel is down. */
-		drm_WARN_ON(&dev_priv->drm, !power_well->desc->hsw.is_tc_tbt);
+		drm_WARN_ON(&dev_priv->drm, !power_well->desc->hsw.is_tc_tbt &&
+			    !(INTEL_GEN(dev_priv) == 11 && dig_port->tc_legacy_port));
+
 	}
 }
 
@@ -520,21 +540,6 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
 	hsw_wait_for_power_well_disable(dev_priv, power_well);
 }
 
-#define ICL_AUX_PW_TO_CH(pw_idx)	\
-	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
-
-#define ICL_TBT_AUX_PW_TO_CH(pw_idx)	\
-	((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C)
-
-static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private *dev_priv,
-				     struct i915_power_well *power_well)
-{
-	int pw_idx = power_well->desc->hsw.idx;
-
-	return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) :
-						 ICL_AUX_PW_TO_CH(pw_idx);
-}
-
 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 
 static u64 async_put_domains_mask(struct i915_power_domains *power_domains);
-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-04-07  1:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-07  1:11 [Intel-gfx] [PATCH v2 1/8] drm/i915/display: Move out code to return the digital_port of the aux ch José Roberto de Souza
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 2/8] drm/i915/display: Add intel_legacy_aux_to_power_domain() José Roberto de Souza
2020-04-07 15:15   ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 3/8] drm/i915/display: Split hsw_power_well_enable() into two José Roberto de Souza
2020-04-07 15:20   ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 4/8] drm/i915/tc/icl: Implement TC cold sequences José Roberto de Souza
2020-04-07 15:42   ` Imre Deak
2020-04-07 20:01     ` Souza, Jose
2020-04-07 21:52       ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 5/8] drm/i915/tc: Skip ref held check for TC legacy aux power wells José Roberto de Souza
2020-04-07 15:42   ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/tc/tgl: Implement TC cold sequences José Roberto de Souza
2020-04-07 16:02   ` Imre Deak
2020-04-07 21:20     ` Souza, Jose
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 7/8] drm/i915/tc: Catch TC users accessing FIA registers without enable aux José Roberto de Souza
2020-04-07 16:04   ` Imre Deak
2020-04-07 18:20     ` Imre Deak
2020-04-07  1:11 ` José Roberto de Souza [this message]
2020-04-07 16:18   ` [Intel-gfx] [PATCH v2 8/8] drm/i915/tc: Do not warn when aux power well of static TC ports timeout Imre Deak
2020-04-07  1:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/8] drm/i915/display: Move out code to return the digital_port of the aux ch Patchwork
2020-04-07  1:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-07  7:35 ` [Intel-gfx] [v2, 1/8] " You-Sheng Yang
2020-04-07 10:28 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/8] " Patchwork
2020-04-07 21:56   ` Souza, Jose
2020-04-07 15:13 ` [Intel-gfx] [PATCH v2 1/8] " Imre Deak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200407011157.362092-8-jose.souza@intel.com \
    --to=jose.souza@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox