From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v8 4/7] drm/i915: Plane configuration affects CDCLK in Gen11+
Date: Thu, 14 May 2020 18:21:42 +0300 [thread overview]
Message-ID: <20200514152145.2449-5-stanislav.lisovskiy@intel.com> (raw)
In-Reply-To: <20200514152145.2449-1-stanislav.lisovskiy@intel.com>
From: Stanislav Lisovskiy <stanislav.lisovskiY@intel.com>
So lets support it.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a9ab66d97360..800ae3768841 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14569,7 +14569,7 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv)
/* See {hsw,vlv,ivb}_plane_ratio() */
return IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv) ||
IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) ||
- IS_IVYBRIDGE(dev_priv);
+ IS_IVYBRIDGE(dev_priv) || (INTEL_GEN(dev_priv) >= 11);
}
static int intel_atomic_check_planes(struct intel_atomic_state *state)
--
2.24.1.485.gad05a3d8e5
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next prev parent reply other threads:[~2020-05-14 15:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 15:21 [Intel-gfx] [PATCH v8 0/7] Consider DBuf bandwidth when calculating CDCLK Stanislav Lisovskiy
2020-05-14 15:21 ` [Intel-gfx] [PATCH v8 1/7] drm/i915: Decouple cdclk calculation from modeset checks Stanislav Lisovskiy
2020-05-14 15:21 ` [Intel-gfx] [PATCH v8 2/7] drm/i915: Extract cdclk requirements checking to separate function Stanislav Lisovskiy
2020-05-14 19:36 ` Manasi Navare
2020-05-14 15:21 ` [Intel-gfx] [PATCH v8 3/7] drm/i915: Check plane configuration properly Stanislav Lisovskiy
2020-05-14 19:38 ` Manasi Navare
2020-05-14 15:21 ` Stanislav Lisovskiy [this message]
2020-05-14 19:41 ` [Intel-gfx] [PATCH v8 4/7] drm/i915: Plane configuration affects CDCLK in Gen11+ Manasi Navare
2020-05-14 15:21 ` [Intel-gfx] [PATCH v8 5/7] drm/i915: Introduce for_each_dbuf_slice_in_mask macro Stanislav Lisovskiy
2020-05-14 19:57 ` Manasi Navare
2020-05-14 15:21 ` [Intel-gfx] [PATCH v8 6/7] drm/i915: Adjust CDCLK accordingly to our DBuf bw needs Stanislav Lisovskiy
2020-05-14 15:43 ` Stanislav Lisovskiy
2020-05-14 20:15 ` Manasi Navare
2020-05-14 18:26 ` kbuild test robot
2020-05-16 21:49 ` kbuild test robot
2020-05-14 15:21 ` [Intel-gfx] [PATCH v8 7/7] drm/i915: Remove unneeded hack now for CDCLK Stanislav Lisovskiy
2020-05-15 15:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Consider DBuf bandwidth when calculating CDCLK (rev13) Patchwork
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