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From: Hans de Goede <hdegoede@redhat.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	"Len Brown" <lenb@kernel.org>
Cc: linux-pwm@vger.kernel.org, linux-acpi@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: [Intel-gfx] [PATCH v2 04/15] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare()
Date: Sun,  7 Jun 2020 20:18:29 +0200	[thread overview]
Message-ID: <20200607181840.13536-5-hdegoede@redhat.com> (raw)
In-Reply-To: <20200607181840.13536-1-hdegoede@redhat.com>

According to the data-sheet the way the PWM controller works is that
each input clock-cycle the base_unit gets added to a N bit counter and
that counter overflowing determines the PWM output frequency.

So assuming e.g. a 16 bit counter this means that if base_unit is set to 1,
after 65535 input clock-cycles the counter has been increased from 0 to
65535 and it will overflow on the next cycle, so it will overflow after
every 65536 clock cycles and thus the calculations done in
pwm_lpss_prepare() should use 65536 and not 65535.

This commit fixes this. Note this also aligns the calculations in
pwm_lpss_prepare() with those in pwm_lpss_get_state().

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/pwm/pwm-lpss.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index cae74ce61654..a764e062103b 100644
--- a/drivers/pwm/pwm-lpss.c
+++ b/drivers/pwm/pwm-lpss.c
@@ -93,7 +93,7 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 	 * The equation is:
 	 * base_unit = round(base_unit_range * freq / c)
 	 */
-	base_unit_range = BIT(lpwm->info->base_unit_bits) - 1;
+	base_unit_range = BIT(lpwm->info->base_unit_bits);
 	freq *= base_unit_range;
 
 	base_unit = DIV_ROUND_CLOSEST_ULL(freq, c);
@@ -112,7 +112,7 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 
 	orig_ctrl = ctrl = pwm_lpss_read(pwm);
 	ctrl &= ~PWM_ON_TIME_DIV_MASK;
-	ctrl &= ~(base_unit_range << PWM_BASE_UNIT_SHIFT);
+	ctrl &= ~((base_unit_range - 1) << PWM_BASE_UNIT_SHIFT);
 	ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
 	ctrl |= on_time_div;
 
-- 
2.26.2

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  parent reply	other threads:[~2020-06-07 18:19 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-07 18:18 [Intel-gfx] [PATCH v2 00/15] pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 01/15] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 02/15] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation) Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 03/15] pwm: lpss: Add range limit check for the base_unit register value Hans de Goede
2020-06-08  3:50   ` Andy Shevchenko
2020-06-08 11:07     ` Hans de Goede
2020-06-08 12:51       ` Andy Shevchenko
2020-06-08 14:19         ` Hans de Goede
2020-06-11 22:12       ` Uwe Kleine-König
2020-06-12 11:57         ` Andy Shevchenko
2020-06-13 20:50           ` Uwe Kleine-König
2020-06-07 18:18 ` Hans de Goede [this message]
2020-06-08  3:55   ` [Intel-gfx] [PATCH v2 04/15] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare() Andy Shevchenko
2020-06-08 11:13     ` Hans de Goede
2020-06-08 12:55       ` Andy Shevchenko
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 05/15] pwm: lpss: Set SW_UPDATE bit when enabling the PWM Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 06/15] pwm: crc: Fix period / duty_cycle times being off by a factor of 256 Hans de Goede
2020-06-09 11:29   ` Andy Shevchenko
2020-06-09 13:45     ` Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 07/15] pwm: crc: Fix off-by-one error in the clock-divider calculations Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 08/15] pwm: crc: Fix period changes not having any effect Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 09/15] pwm: crc: Enable/disable PWM output on enable/disable Hans de Goede
2020-06-09 11:31   ` Andy Shevchenko
2020-06-11 22:20   ` Uwe Kleine-König
2020-06-12 16:59     ` Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 10/15] pwm: crc: Implement apply() method to support the new atomic PWM API Hans de Goede
2020-06-09 11:32   ` Andy Shevchenko
2020-06-09 13:44     ` Hans de Goede
2020-06-09 13:50       ` Andy Shevchenko
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 11/15] pwm: crc: Implement get_state() method Hans de Goede
2020-06-09 11:32   ` Andy Shevchenko
2020-06-11 21:37   ` Uwe Kleine-König
2020-06-12 17:00     ` Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 12/15] drm/i915: panel: Add get_vbt_pwm_freq() helper Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 13/15] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 14/15] drm/i915: panel: Honor the VBT PWM min setting " Hans de Goede
2020-06-07 18:18 ` [Intel-gfx] [PATCH v2 15/15] drm/i915: panel: Use atomic PWM API " Hans de Goede
2020-06-07 18:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Patchwork
2020-06-07 18:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-07 19:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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