From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 4/7] drm/i915/rkl: Don't try to read out DSI transcoders
Date: Tue, 9 Jun 2020 18:15:41 +0300 [thread overview]
Message-ID: <20200609151541.GS6112@intel.com> (raw)
In-Reply-To: <20200606025740.3308880-5-matthew.d.roper@intel.com>
On Fri, Jun 05, 2020 at 07:57:37PM -0700, Matt Roper wrote:
> From: Aditya Swarup <aditya.swarup@intel.com>
>
> RKL doesn't have DSI outputs, so we shouldn't try to read out the DSI
> transcoder registers.
>
> v2(MattR):
> - Just set the 'extra panel mask' to edp | dsi0 | dsi1 and then mask
> against the platform's cpu_transcoder_mask to filter out the ones
> that don't exist on a given platform. (Ville)
>
> v3(MattR):
> - Only include DSI transcoders on gen11+ again. (Ville)
> - Use for_each_cpu_transcoder_masked() for loop. (Ville)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 10 +++-------
> 1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 9820874d3ea2..6c2bb3354b86 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10904,7 +10904,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> enum intel_display_power_domain power_domain;
> - unsigned long panel_transcoder_mask = 0;
> + unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
> unsigned long enabled_panel_transcoders = 0;
Could get rid of the longs now that we're no longer using
for_each_set_bit()
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> enum transcoder panel_transcoder;
> intel_wakeref_t wf;
> @@ -10914,9 +10914,6 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
> panel_transcoder_mask |=
> BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
>
> - if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP))
> - panel_transcoder_mask |= BIT(TRANSCODER_EDP);
> -
> /*
> * The pipe->transcoder mapping is fixed with the exception of the eDP
> * and DSI transcoders handled below.
> @@ -10927,9 +10924,8 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
> * XXX: Do intel_display_power_get_if_enabled before reading this (for
> * consistency and less surprising code; it's in always on power).
> */
> - for_each_set_bit(panel_transcoder,
> - &panel_transcoder_mask,
> - ARRAY_SIZE(INTEL_INFO(dev_priv)->trans_offsets)) {
> + for_each_cpu_transcoder_masked(dev_priv, panel_transcoder,
> + panel_transcoder_mask) {
> bool force_thru = false;
> enum pipe trans_pipe;
>
> --
> 2.24.1
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-06-09 15:15 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-06 2:57 [Intel-gfx] [PATCH v4 0/7] Remaining RKL patches Matt Roper
2020-06-06 2:57 ` [Intel-gfx] [PATCH v4 1/7] drm/i915/rkl: RKL uses ABOX0 for pixel transfers Matt Roper
2020-06-09 15:14 ` Ville Syrjälä
2020-06-06 2:57 ` [Intel-gfx] [PATCH v4 2/7] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout Matt Roper
2020-06-06 2:57 ` [Intel-gfx] [PATCH v4 3/7] drm/i915/rkl: Update TGP's pin mapping when paired with RKL Matt Roper
2020-06-09 15:14 ` Ville Syrjälä
2020-06-06 2:57 ` [Intel-gfx] [PATCH v4 4/7] drm/i915/rkl: Don't try to read out DSI transcoders Matt Roper
2020-06-09 15:15 ` Ville Syrjälä [this message]
2020-06-06 2:57 ` [Intel-gfx] [PATCH v4 5/7] drm/i915/rkl: Add DPLL4 support Matt Roper
2020-06-06 2:57 ` [Intel-gfx] [PATCH v4 6/7] drm/i915/rkl: Handle HTI Matt Roper
2020-06-06 2:57 ` [Intel-gfx] [PATCH v4 7/7] drm/i915/rkl: Add initial workarounds Matt Roper
2020-06-06 3:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Remaining RKL patches (rev2) Patchwork
2020-06-06 3:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-06 4:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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