From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v6 01/11] drm/i915/display: Add HDR Capability detection for LSPCON
Date: Tue, 15 Sep 2020 02:30:37 +0530 [thread overview]
Message-ID: <20200914210047.11972-2-uma.shankar@intel.com> (raw)
In-Reply-To: <20200914210047.11972-1-uma.shankar@intel.com>
LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES
DPCD register. LSPCON implementations capable of supporting
HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch
reads the same, detects the HDR capability and adds this to
intel_lspcon struct.
v2: Addressed Jani Nikula's review comment and fixed the HDR
capability detection logic
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_lspcon.c | 30 +++++++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index b2d0edacc58c..5cf4e7a591e0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1396,6 +1396,7 @@ struct intel_lspcon {
bool active;
enum drm_lspcon_mode mode;
enum lspcon_vendor vendor;
+ bool hdr_supported;
};
struct intel_digital_port {
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index dc1b35559afd..8e8c7a02ab51 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -35,6 +35,8 @@
#define LSPCON_VENDOR_PARADE_OUI 0x001CF8
#define LSPCON_VENDOR_MCA_OUI 0x0060AD
+#define DPCD_MCA_LSPCON_HDR_STATUS 0x70003
+
/* AUX addresses to write MCA AVI IF */
#define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
#define LSPCON_MCA_AVI_IF_CTRL 0x5DF
@@ -104,6 +106,32 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
return true;
}
+static void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
+{
+ struct intel_digital_port *intel_dig_port =
+ container_of(lspcon, struct intel_digital_port, lspcon);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
+ u8 hdr_caps;
+ int ret;
+
+ /* Enable HDR for MCA based LSPCON devices */
+ if (lspcon->vendor == LSPCON_VENDOR_MCA)
+ ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
+ &hdr_caps, 1);
+ else
+ return;
+
+ if (ret < 0) {
+ drm_dbg_kms(dev, "hdr capability detection failed\n");
+ lspcon->hdr_supported = false;
+ return;
+ } else if (hdr_caps & 0x1) {
+ drm_dbg_kms(dev, "lspcon capable of HDR\n");
+ lspcon->hdr_supported = true;
+ }
+}
+
static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
{
enum drm_lspcon_mode current_mode;
@@ -581,6 +609,8 @@ bool lspcon_init(struct intel_digital_port *dig_port)
return false;
}
+ lspcon_detect_hdr_capability(lspcon);
+
connector->ycbcr_420_allowed = true;
lspcon->active = true;
DRM_DEBUG_KMS("Success: LSPCON init\n");
--
2.26.2
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next prev parent reply other threads:[~2020-09-14 20:25 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-14 21:00 [Intel-gfx] [v6 00/11] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-09-14 21:00 ` Uma Shankar [this message]
2020-09-14 21:00 ` [Intel-gfx] [v6 02/11] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-09-29 16:12 ` Ville Syrjälä
2020-10-05 21:25 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 03/11] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-09-29 16:14 ` Ville Syrjälä
2020-10-05 21:32 ` Shankar, Uma
2020-10-06 9:06 ` Ville Syrjälä
2020-10-06 12:26 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 04/11] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-09-29 16:18 ` Ville Syrjälä
2020-10-05 21:33 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 05/11] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-09-29 16:19 ` Ville Syrjälä
2020-10-05 21:33 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 06/11] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-09-29 16:20 ` Ville Syrjälä
2020-10-05 21:36 ` Shankar, Uma
2020-10-06 9:09 ` Ville Syrjälä
2020-10-06 12:27 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 07/11] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-09-29 16:22 ` Ville Syrjälä
2020-10-05 21:37 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 08/11] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 09/11] drm/i915/lspcon: Do not send infoframes to non-HDMI sinks Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 10/11] drm/i915/lspcon: Do not send DRM " Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 11/11] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-09-14 21:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev6) Patchwork
2020-09-14 22:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-15 7:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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