From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [v6 02/11] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
Date: Mon, 5 Oct 2020 21:25:52 +0000 [thread overview]
Message-ID: <2aaba4e302b44af4a3f9ee964fab6e73@intel.com> (raw)
In-Reply-To: <20200929161211.GZ6112@intel.com>
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Tuesday, September 29, 2020 9:42 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [v6 02/11] drm/i915/display: Enable HDR on gen9 devices with MCA
> Lspcon
>
> On Tue, Sep 15, 2020 at 02:30:38AM +0530, Uma Shankar wrote:
> > Gen9 hardware supports HDMI2.0 through LSPCON chips.
> > Extending HDR support for MCA LSPCON based GEN9 devices.
> >
> > SOC will drive LSPCON as DP and send HDR metadata as standard DP SDP
> > packets. LSPCON will be set to operate in PCON mode, will receive the
> > metadata and create Dynamic Range and Mastering Infoframe (DRM
> > packets) and send it to HDR capable HDMI sink devices.
> >
> > v2: Re-used hsw infoframe write implementation for HDR metadata for
> > LSPCON as per Ville's suggestion.
> >
> > v3: Addressed Jani Nikula's review comments.
> >
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_hdmi.c | 10 ++++++
> > drivers/gpu/drm/i915/display/intel_lspcon.c | 37
> > +++++++++++++++------ drivers/gpu/drm/i915/display/intel_lspcon.h |
> > 5 ++-
> > 3 files changed, 40 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index 0978b0d8f4c6..1e40ed473fb9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -590,6 +590,16 @@ static u32 hsw_infoframes_enabled(struct
> intel_encoder *encoder,
> > return val & mask;
> > }
> >
> > +void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
> > + const struct intel_crtc_state *crtc_state,
> > + unsigned int type,
> > + const void *frame, ssize_t len)
> > +{
> > + drm_dbg_kms(encoder->base.dev, "Update HDR metadata for lspcon\n");
> > + /* It uses the legacy hsw implementation for the same */
> > + hsw_write_infoframe(encoder, crtc_state, type, frame, len); }
>
> This wrapper seems quite pointless.
Hmm yeah, will drop this.
> > +
> > static const u8 infoframe_type_to_idx[] = {
> > HDMI_PACKET_TYPE_GENERAL_CONTROL,
> > HDMI_PACKET_TYPE_GAMUT_METADATA,
> > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > index 8e8c7a02ab51..5e2d7ca1d20f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > @@ -461,27 +461,42 @@ void lspcon_write_infoframe(struct intel_encoder
> *encoder,
> > unsigned int type,
> > const void *frame, ssize_t len) {
> > - bool ret;
> > + bool ret = true;
> > struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> >
> > - /* LSPCON only needs AVI IF */
> > - if (type != HDMI_INFOFRAME_TYPE_AVI)
> > + /*
> > + * Supporting HDR on MCA LSPCON
> > + * Todo: Add support for Parade later
> > + */
> > + if (type == HDMI_PACKET_TYPE_GAMUT_METADATA &&
> > + lspcon->vendor != LSPCON_VENDOR_MCA)
> > return;
>
> We shouldn't have the infoframe flagged as enabled if we don't support it. So
> this check seems pointless, or there's a bug somewhere else.
Sure, will drop this check. It's not required.
> >
> > - if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > - ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
> > - frame, len);
> > - else
> > - ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
> > - frame, len);
> > + switch (type) {
> > + case HDMI_INFOFRAME_TYPE_AVI:
> > + if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > + ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
> > + frame, len);
> > + else
> > + ret = _lspcon_write_avi_infoframe_parade(&intel_dp-
> >aux,
> > + frame, len);
> > + break;
> > + case HDMI_PACKET_TYPE_GAMUT_METADATA:
> > + lspcon_drm_write_infoframe(encoder, crtc_state,
> > +
> HDMI_PACKET_TYPE_GAMUT_METADATA,
> > + frame, VIDEO_DIP_DATA_SIZE);
>
> Why are we hardocoding the parameters here? Just pass them through?
Ok, will rectify this.
> > + break;
> > + default:
> > + return;
> > + }
> >
> > if (!ret) {
> > - DRM_ERROR("Failed to write AVI infoframes\n");
> > + DRM_ERROR("Failed to write infoframes\n");
> > return;
> > }
> >
> > - DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n");
> > + DRM_DEBUG_DRIVER("Infoframes updated successfully\n");
>
> That pointless debug should probably be just nuked.
Ok, will drop it.
> > }
> >
> > void lspcon_read_infoframe(struct intel_encoder *encoder, diff --git
> > a/drivers/gpu/drm/i915/display/intel_lspcon.h
> > b/drivers/gpu/drm/i915/display/intel_lspcon.h
> > index 1cffe8a42a08..3fac05535731 100644
> > --- a/drivers/gpu/drm/i915/display/intel_lspcon.h
> > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
> > @@ -34,5 +34,8 @@ u32 lspcon_infoframes_enabled(struct intel_encoder
> *encoder,
> > const struct intel_crtc_state *pipe_config); void
> > lspcon_ycbcr420_config(struct drm_connector *connector,
> > struct intel_crtc_state *crtc_state);
> > -
> > +void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
> > + const struct intel_crtc_state *crtc_state,
> > + unsigned int type,
> > + const void *frame, ssize_t len);
>
> I think we ususally leave a blank line here.
Will do it.
> > #endif /* __INTEL_LSPCON_H__ */
> > --
> > 2.26.2
>
> --
> Ville Syrjälä
> Intel
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next prev parent reply other threads:[~2020-10-06 2:03 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-14 21:00 [Intel-gfx] [v6 00/11] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 01/11] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 02/11] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-09-29 16:12 ` Ville Syrjälä
2020-10-05 21:25 ` Shankar, Uma [this message]
2020-09-14 21:00 ` [Intel-gfx] [v6 03/11] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-09-29 16:14 ` Ville Syrjälä
2020-10-05 21:32 ` Shankar, Uma
2020-10-06 9:06 ` Ville Syrjälä
2020-10-06 12:26 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 04/11] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-09-29 16:18 ` Ville Syrjälä
2020-10-05 21:33 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 05/11] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-09-29 16:19 ` Ville Syrjälä
2020-10-05 21:33 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 06/11] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-09-29 16:20 ` Ville Syrjälä
2020-10-05 21:36 ` Shankar, Uma
2020-10-06 9:09 ` Ville Syrjälä
2020-10-06 12:27 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 07/11] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-09-29 16:22 ` Ville Syrjälä
2020-10-05 21:37 ` Shankar, Uma
2020-09-14 21:00 ` [Intel-gfx] [v6 08/11] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 09/11] drm/i915/lspcon: Do not send infoframes to non-HDMI sinks Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 10/11] drm/i915/lspcon: Do not send DRM " Uma Shankar
2020-09-14 21:00 ` [Intel-gfx] [v6 11/11] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-09-14 21:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev6) Patchwork
2020-09-14 22:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-15 7:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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