From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Karthik B S <karthik.b.s@intel.com>
Cc: paulo.r.zanoni@intel.com, michel@daenzer.net,
dri-devel@lists.freedesktop.org, nicholas.kazlauskas@amd.com,
daniel.vetter@intel.com, harry.wentland@amd.com,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v8 2/8] drm/i915: Add support for async flips in I915
Date: Tue, 15 Sep 2020 16:48:28 +0300 [thread overview]
Message-ID: <20200915134828.GI6112@intel.com> (raw)
In-Reply-To: <20200914055633.21109-3-karthik.b.s@intel.com>
On Mon, Sep 14, 2020 at 11:26:27AM +0530, Karthik B S wrote:
> Set the Async Address Update Enable bit in plane ctl
> when async flip is requested.
>
> v2: -Move the Async flip enablement to individual patch (Paulo)
>
> v3: -Rebased.
>
> v4: -Add separate plane hook for async flip case (Ville)
>
> v5: -Rebased.
>
> v6: -Move the plane hook to separate patch. (Paulo)
> -Remove the early return in skl_plane_ctl. (Paulo)
>
> v7: -Move async address update enable to skl_plane_ctl_crtc() (Ville)
>
> v8: -Rebased.
>
> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 3 +++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 48712fb0a251..2902fefd217f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4785,6 +4785,9 @@ u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state)
> struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> u32 plane_ctl = 0;
>
> + if (crtc_state->uapi.async_flip)
> + plane_ctl |= PLANE_CTL_ASYNC_FLIP;
> +
> if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> return plane_ctl;
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 90a05e37ba2f..1c4ddd4deba0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6923,6 +6923,7 @@ enum {
> #define PLANE_CTL_TILED_X (1 << 10)
> #define PLANE_CTL_TILED_Y (4 << 10)
> #define PLANE_CTL_TILED_YF (5 << 10)
> +#define PLANE_CTL_ASYNC_FLIP (1 << 9)
> #define PLANE_CTL_FLIP_HORIZONTAL (1 << 8)
> #define PLANE_CTL_MEDIA_DECOMPRESSION_ENABLE (1 << 4) /* TGL+ */
> #define PLANE_CTL_ALPHA_MASK (0x3 << 4) /* Pre-GLK */
> --
> 2.22.0
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-09-15 13:48 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-14 5:56 [Intel-gfx] [PATCH v8 0/8] Asynchronous flip implementation for i915 Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 1/8] drm/i915: Add enable/disable flip done and flip done handler Karthik B S
2020-09-15 13:47 ` Ville Syrjälä
2020-09-16 12:36 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 2/8] drm/i915: Add support for async flips in I915 Karthik B S
2020-09-15 13:48 ` Ville Syrjälä [this message]
2020-09-16 12:38 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 3/8] drm/i915: Add checks specific to async flips Karthik B S
2020-09-15 14:03 ` Ville Syrjälä
2020-09-16 12:44 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 4/8] drm/i915: Do not call drm_crtc_arm_vblank_event in " Karthik B S
2020-09-15 14:07 ` Ville Syrjälä
2020-09-16 12:46 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 5/8] drm/i915: Add dedicated plane hook for async flip case Karthik B S
2020-09-15 14:10 ` Ville Syrjälä
2020-09-16 12:48 ` Karthik B S
2020-09-15 14:41 ` Ville Syrjälä
2020-09-16 13:00 ` Karthik B S
2020-09-16 15:52 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 6/8] drm/i915: WA for platforms with double buffered adress update enable bit Karthik B S
2020-09-15 14:19 ` Ville Syrjälä
2020-09-16 12:54 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 7/8] Documentation/gpu: Add asynchronous flip documentation for i915 Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 8/8] drm/i915: Enable async flips in i915 Karthik B S
2020-09-14 11:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Asynchronous flip implementation for i915 (rev8) Patchwork
2020-09-14 11:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-14 11:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-14 13:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200915134828.GI6112@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=daniel.vetter@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=harry.wentland@amd.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=karthik.b.s@intel.com \
--cc=michel@daenzer.net \
--cc=nicholas.kazlauskas@amd.com \
--cc=paulo.r.zanoni@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox