From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/7] drm/i915: Factor out a helper to disable the DPCD training pattern
Date: Tue, 22 Sep 2020 15:51:03 +0300 [thread overview]
Message-ID: <20200922125106.30540-5-imre.deak@intel.com> (raw)
In-Reply-To: <20200922125106.30540-1-imre.deak@intel.com>
To prepare for a follow-up LTTPR change factor out a helper to disable
the training pattern in DPCD. We'll need to do this for each LTTPR
(without programming the port to output the idle pattern) when training
in LTTPR non-transparent mode.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
.../drm/i915/display/intel_dp_link_training.c | 28 +++++++++++--------
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 0c3809891bd2..6994a32244dc 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -102,30 +102,34 @@ void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
intel_dp->train_set[lane] = v | p;
}
+static bool intel_dp_disable_dpcd_training_pattern(struct intel_dp *intel_dp)
+{
+ u8 val = DP_TRAINING_PATTERN_DISABLE;
+
+ return drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET, &val, 1) == 1;
+}
+
static bool
intel_dp_set_link_train(struct intel_dp *intel_dp,
u8 dp_train_pat)
{
u8 buf[sizeof(intel_dp->train_set) + 1];
- int ret, len;
+ int len;
intel_dp_program_link_training_pattern(intel_dp, dp_train_pat);
- buf[0] = dp_train_pat;
if ((dp_train_pat & ~DP_LINK_SCRAMBLING_DISABLE) ==
- DP_TRAINING_PATTERN_DISABLE) {
+ DP_TRAINING_PATTERN_DISABLE)
/* don't write DP_TRAINING_LANEx_SET on disable */
- len = 1;
- } else {
- /* DP_TRAINING_LANEx_SET follow DP_TRAINING_PATTERN_SET */
- memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count);
- len = intel_dp->lane_count + 1;
- }
+ return intel_dp_disable_dpcd_training_pattern(intel_dp);
- ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET,
- buf, len);
+ buf[0] = dp_train_pat;
+ /* DP_TRAINING_LANEx_SET follow DP_TRAINING_PATTERN_SET */
+ memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count);
+ len = intel_dp->lane_count + 1;
- return ret == len;
+ return drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET,
+ buf, len) == len;
}
static bool
--
2.17.1
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next prev parent reply other threads:[~2020-09-22 12:51 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-22 12:50 [Intel-gfx] [PATCH 0/7] drm/i915: Add support for LTTPR non-transparent link training mode Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 1/7] drm/i915: Fix DP link training pattern mask Imre Deak
2020-09-22 13:13 ` Ville Syrjälä
2020-09-22 14:41 ` Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 2/7] drm/i915: Move intel_dp_get_link_status to intel_dp_link_training.c Imre Deak
2020-09-22 13:14 ` Ville Syrjälä
2020-09-22 14:45 ` Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 3/7] drm/i915: Simplify the link training functions Imre Deak
2020-09-22 13:27 ` Ville Syrjälä
2020-09-22 15:30 ` Imre Deak
2020-09-22 16:49 ` Ville Syrjälä
2020-09-22 17:25 ` Imre Deak
2020-09-22 17:44 ` Ville Syrjälä
2020-09-22 12:51 ` Imre Deak [this message]
2020-09-22 16:54 ` [Intel-gfx] [PATCH 4/7] drm/i915: Factor out a helper to disable the DPCD training pattern Ville Syrjälä
2020-09-22 17:41 ` Imre Deak
2020-09-22 17:47 ` Ville Syrjälä
2020-09-22 17:59 ` Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 5/7] drm/dp: Add LTTPR helpers Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 6/7] drm/i915: Switch to LTTPR transparent mode link training Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 7/7] drm/i915: Switch to LTTPR non-transparent " Imre Deak
2020-09-22 17:37 ` Ville Syrjälä
2020-09-22 18:26 ` Imre Deak
2020-09-22 13:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for LTTPR non-transparent link training mode Patchwork
2020-09-22 13:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-22 13:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-22 15:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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