From: Imre Deak <imre.deak@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/7] drm/i915: Move intel_dp_get_link_status to intel_dp_link_training.c
Date: Tue, 22 Sep 2020 17:45:43 +0300 [thread overview]
Message-ID: <20200922144543.GE23028@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <20200922131424.GR6112@intel.com>
On Tue, Sep 22, 2020 at 04:14:24PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 22, 2020 at 03:51:01PM +0300, Imre Deak wrote:
> > The link status is used to communicate the parameters of the link
> > training with the DPRX and determine if the link training is successful
> > or a retraining is needed. Accordingly move the function to read the
> > link status to intel_dp_link_training.c
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 11 -----------
> > drivers/gpu/drm/i915/display/intel_dp.h | 2 --
> > .../drm/i915/display/intel_dp_link_training.c | 16 ++++++++++++++++
> > .../drm/i915/display/intel_dp_link_training.h | 3 +++
> > 4 files changed, 19 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 2a4a9c0e7427..ee93a00a4d5e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4126,17 +4126,6 @@ static void chv_dp_post_pll_disable(struct intel_atomic_state *state,
> > chv_phy_post_pll_disable(encoder, old_crtc_state);
> > }
> >
> > -/*
> > - * Fetch AUX CH registers 0x202 - 0x207 which contain
> > - * link status information
> > - */
> > -bool
> > -intel_dp_get_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STATUS_SIZE])
> > -{
> > - return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status,
> > - DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE;
> > -}
> > -
> > static u8 intel_dp_voltage_max_2(struct intel_dp *intel_dp)
> > {
> > return DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> > index 08a1c0aa8b94..34ae7988a554 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -100,8 +100,6 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
> > u8 *link_bw, u8 *rate_select);
> > bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
> > bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
> > -bool
> > -intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status);
> >
> > bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
> > int intel_dp_link_required(int pixel_clock, int bpp);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > index f8b53c5b5777..6d13d00db5e6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > @@ -34,6 +34,22 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
> > link_status[3], link_status[4], link_status[5]);
> > }
> >
> > +/**
> > + * intel_dp_get_link_status - get the link status information for the DPRX
> > + * @intel_dp: DP struct
> > + * @link_status: buffer to return the status in
> > + *
> > + * Fetch the AUX DPCD registers for the DPRX link status.
> > + *
> > + * Returns true if the information was read successfully, false otherwise.
> > + */
> > +bool
> > +intel_dp_get_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STATUS_SIZE])
> > +{
> > + return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status,
> > + DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE;
> > +}
> > +
> > static u8 dp_voltage_max(u8 preemph)
> > {
> > switch (preemph & DP_TRAIN_PRE_EMPHASIS_MASK) {
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> > index 01f1dabbb060..47c97f4a0d57 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> > @@ -10,6 +10,9 @@
> >
> > struct intel_dp;
> >
> > +bool intel_dp_get_link_status(struct intel_dp *intel_dp,
> > + u8 link_status[DP_LINK_STATUS_SIZE]);
> > +
>
> Do we still need it outside? Hmm, I guess we do.
Yes, for PHY auto-testing, but I think that should rather depend on the
regular link training sequence as discussed elsewhere.
>
> Oh well
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> > void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> > const u8 link_status[DP_LINK_STATUS_SIZE]);
> > void intel_dp_start_link_train(struct intel_dp *intel_dp);
> > --
> > 2.17.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel
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next prev parent reply other threads:[~2020-09-22 14:45 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-22 12:50 [Intel-gfx] [PATCH 0/7] drm/i915: Add support for LTTPR non-transparent link training mode Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 1/7] drm/i915: Fix DP link training pattern mask Imre Deak
2020-09-22 13:13 ` Ville Syrjälä
2020-09-22 14:41 ` Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 2/7] drm/i915: Move intel_dp_get_link_status to intel_dp_link_training.c Imre Deak
2020-09-22 13:14 ` Ville Syrjälä
2020-09-22 14:45 ` Imre Deak [this message]
2020-09-22 12:51 ` [Intel-gfx] [PATCH 3/7] drm/i915: Simplify the link training functions Imre Deak
2020-09-22 13:27 ` Ville Syrjälä
2020-09-22 15:30 ` Imre Deak
2020-09-22 16:49 ` Ville Syrjälä
2020-09-22 17:25 ` Imre Deak
2020-09-22 17:44 ` Ville Syrjälä
2020-09-22 12:51 ` [Intel-gfx] [PATCH 4/7] drm/i915: Factor out a helper to disable the DPCD training pattern Imre Deak
2020-09-22 16:54 ` Ville Syrjälä
2020-09-22 17:41 ` Imre Deak
2020-09-22 17:47 ` Ville Syrjälä
2020-09-22 17:59 ` Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 5/7] drm/dp: Add LTTPR helpers Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 6/7] drm/i915: Switch to LTTPR transparent mode link training Imre Deak
2020-09-22 12:51 ` [Intel-gfx] [PATCH 7/7] drm/i915: Switch to LTTPR non-transparent " Imre Deak
2020-09-22 17:37 ` Ville Syrjälä
2020-09-22 18:26 ` Imre Deak
2020-09-22 13:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for LTTPR non-transparent link training mode Patchwork
2020-09-22 13:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-22 13:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-22 15:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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