From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris.p.wilson@intel.com>
Subject: [Intel-gfx] [PATCH 2/6] drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock
Date: Fri, 9 Oct 2020 17:21:01 -0700 [thread overview]
Message-ID: <20201010002105.45152-3-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20201010002105.45152-1-umesh.nerlige.ramappa@intel.com>
Refactor intel_engine_apply_whitelist into locked and unlocked versions
so that a caller who already has the lock can apply whitelist.
v2: Fix sparse warning
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 44 +++++++++++++++------
1 file changed, 31 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 6c580d0d9ea8..864194aa6eef 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1295,7 +1295,8 @@ void intel_gt_init_workarounds(struct drm_i915_private *i915)
}
static enum forcewake_domains
-wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
+wal_get_fw(struct intel_uncore *uncore, const struct i915_wa_list *wal,
+ unsigned int op)
{
enum forcewake_domains fw = 0;
struct i915_wa *wa;
@@ -1304,8 +1305,7 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
fw |= intel_uncore_forcewake_for_reg(uncore,
wa->reg,
- FW_REG_READ |
- FW_REG_WRITE);
+ op);
return fw;
}
@@ -1335,7 +1335,7 @@ wa_list_apply(struct intel_uncore *uncore, const struct i915_wa_list *wal)
if (!wal->count)
return;
- fw = wal_get_fw_for_rmw(uncore, wal);
+ fw = wal_get_fw(uncore, wal, FW_REG_READ | FW_REG_WRITE);
spin_lock_irqsave(&uncore->lock, flags);
intel_uncore_forcewake_get__locked(uncore, fw);
@@ -1645,27 +1645,45 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
wa_init_finish(w);
}
-void intel_engine_apply_whitelist(struct intel_engine_cs *engine)
+static void intel_engine_apply_whitelist_locked(struct intel_engine_cs *engine)
{
const struct i915_wa_list *wal = &engine->whitelist;
struct intel_uncore *uncore = engine->uncore;
const u32 base = engine->mmio_base;
struct i915_wa *wa;
unsigned int i;
+ enum forcewake_domains fw;
- if (!wal->count)
- return;
+ lockdep_assert_held(&uncore->lock);
+
+ fw = wal_get_fw(uncore, wal, FW_REG_WRITE);
+ intel_uncore_forcewake_get__locked(uncore, fw);
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
- intel_uncore_write(uncore,
- RING_FORCE_TO_NONPRIV(base, i),
- i915_mmio_reg_offset(wa->reg));
+ intel_uncore_write_fw(uncore,
+ RING_FORCE_TO_NONPRIV(base, i),
+ i915_mmio_reg_offset(wa->reg));
/* And clear the rest just in case of garbage */
for (; i < RING_MAX_NONPRIV_SLOTS; i++)
- intel_uncore_write(uncore,
- RING_FORCE_TO_NONPRIV(base, i),
- i915_mmio_reg_offset(RING_NOPID(base)));
+ intel_uncore_write_fw(uncore,
+ RING_FORCE_TO_NONPRIV(base, i),
+ i915_mmio_reg_offset(RING_NOPID(base)));
+
+ intel_uncore_forcewake_put__locked(uncore, fw);
+}
+
+void intel_engine_apply_whitelist(struct intel_engine_cs *engine)
+{
+ unsigned long flags;
+ const struct i915_wa_list *wal = &engine->whitelist;
+
+ if (!wal->count)
+ return;
+
+ spin_lock_irqsave(&engine->uncore->lock, flags);
+ intel_engine_apply_whitelist_locked(engine);
+ spin_unlock_irqrestore(&engine->uncore->lock, flags);
}
static void
--
2.20.1
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next prev parent reply other threads:[~2020-10-10 0:21 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-10 0:20 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
2020-10-10 0:21 ` [Intel-gfx] [PATCH 1/6] drm/i915/perf: Ensure observation logic is not clock gated Umesh Nerlige Ramappa
2020-10-10 0:21 ` Umesh Nerlige Ramappa [this message]
2020-11-12 19:37 ` [Intel-gfx] [PATCH 2/6] drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock Chris Wilson
2020-10-10 0:21 ` [Intel-gfx] [PATCH 3/6] drm/i915/perf: Whitelist OA report trigger registers Umesh Nerlige Ramappa
2020-10-10 0:21 ` [Intel-gfx] [PATCH 4/6] drm/i915/gt: Refactor _wa_add to reuse wa_index and wa_list_grow Umesh Nerlige Ramappa
2020-11-12 19:44 ` Chris Wilson
2020-11-13 10:40 ` Tvrtko Ursulin
2020-11-13 11:02 ` Chris Wilson
2020-10-10 0:21 ` [Intel-gfx] [PATCH 5/6] drm/i915/perf: Whitelist OA counter and buffer registers Umesh Nerlige Ramappa
2020-10-10 0:21 ` [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query Umesh Nerlige Ramappa
2020-10-10 0:53 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Allow privileged user to map the OA buffer Patchwork
-- strict thread matches above, loose matches on Subject: below --
2020-10-02 23:27 [Intel-gfx] [PATCH 0/6] " Umesh Nerlige Ramappa
2020-10-02 23:27 ` [Intel-gfx] [PATCH 2/6] drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock Umesh Nerlige Ramappa
2020-10-03 2:52 ` kernel test robot
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