From: Chris Wilson <chris@chris-wilson.co.uk>
To: igt-dev@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org, Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH i-g-t 02/10] i915/gem_exec_balancer: Check balancer submission latency
Date: Wed, 14 Oct 2020 11:40:30 +0100 [thread overview]
Message-ID: <20201014104038.2554985-2-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20201014104038.2554985-1-chris@chris-wilson.co.uk>
While CI is unreliable in terms of detecting performance deltas, it
should still be able to detect when we are orders of magnitude off
expectations. In this case, latency/throughput when submitting to a load
balancer should be on par with a native engine.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_exec_balancer.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index 35a032ccb..0c334b91b 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -2380,6 +2380,7 @@ static void nop(int i915)
for (int class = 0; class < 32; class++) {
struct i915_engine_class_instance *ci;
unsigned int count;
+ double max = 0;
uint32_t ctx;
ci = list_engines(i915, 1u << class, &count);
@@ -2410,6 +2411,8 @@ static void nop(int i915)
t = igt_nsec_elapsed(&tv) * 1e-3 / nops;
igt_info("%s:%d %.3fus\n", class_to_str(class), n, t);
+ if (t > max)
+ max = t;
}
{
@@ -2433,9 +2436,10 @@ static void nop(int i915)
t = igt_nsec_elapsed(&tv) * 1e-3 / nops;
igt_info("%s:* %.3fus\n", class_to_str(class), t);
+ if (t > 10 * max)
+ igt_warn("Balancer submission %.1fx worse than normal!\n", t / max);
}
-
igt_fork(child, count) {
struct drm_i915_gem_execbuffer2 execbuf = {
.buffers_ptr = to_user_pointer(&batch),
@@ -2476,6 +2480,8 @@ static void nop(int i915)
t = igt_nsec_elapsed(&tv) * 1e-3 / nops;
igt_info("[%d] %s:* %.3fus\n",
child, class_to_str(class), t);
+ if (t > 20 * max)
+ igt_warn("[%d] Balancer submission %.1fx worse than normal!\n", child, t / max);
gem_context_destroy(i915, execbuf.rsvd1);
}
--
2.28.0
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next prev parent reply other threads:[~2020-10-14 10:41 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-14 10:40 [Intel-gfx] [PATCH i-g-t 01/10] i915/gem_userptr_blits: Tighten has_userptr() Chris Wilson
2020-10-14 10:40 ` Chris Wilson [this message]
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 03/10] i915/gen9_exec_parse: Check oversized batch with length==0 Chris Wilson
2020-10-14 10:43 ` Matthew Auld
2020-10-14 10:49 ` [Intel-gfx] [igt-dev] " Chris Wilson
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 04/10] i915/gem_exec_schedule: Include userptr scheduling tests Chris Wilson
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 05/10] i915/gem_exec_balancer: Check interactions between bonds and userptr Chris Wilson
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 06/10] i915/gem_exec_reloc: Continuing the trend of checking userptr Chris Wilson
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 07/10] i915/gem_userptr_blits: Test execution isolation Chris Wilson
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 08/10] lib: Use unsigned gen for forward compatible tests Chris Wilson
2020-10-15 4:58 ` Zbigniew Kempczyński
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 09/10] tests/i915: Treat gen as unsigned for forward compatibility Chris Wilson
2020-10-14 10:40 ` [Intel-gfx] [PATCH i-g-t 10/10] i915/gem_exec_schedule: Try to spot unfairness Chris Wilson
2020-10-15 12:53 ` [Intel-gfx] [igt-dev] [PATCH i-g-t 01/10] i915/gem_userptr_blits: Tighten has_userptr() Tvrtko Ursulin
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