From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Manasi Navare <manasi.d.navare@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v10 09/11] drm/i915: Add bigjoiner aware plane clipping checks
Date: Mon, 19 Oct 2020 19:20:31 +0300 [thread overview]
Message-ID: <20201019162031.GT6112@intel.com> (raw)
In-Reply-To: <20201008214535.22942-9-manasi.d.navare@intel.com>
On Thu, Oct 08, 2020 at 02:45:33PM -0700, Manasi Navare wrote:
> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>
> We need to look at hw.fb for the framebuffer, and add the translation
> for the slave_plane_state. With these changes we set the correct
> rectangle on the bigjoiner slave, and don't set incorrect
> src/dst/visibility on the slave plane.
>
> v2:
> * Manual rebase (Manasi)
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 60 +++++++++++++++++++
> .../gpu/drm/i915/display/intel_atomic_plane.h | 4 ++
> drivers/gpu/drm/i915/display/intel_display.c | 19 +++---
> drivers/gpu/drm/i915/display/intel_sprite.c | 21 +++----
> 4 files changed, 80 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index a8f1fd85a6c0..09cb3adc36da 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -267,6 +267,9 @@ void intel_plane_copy_uapi_to_hw_state(const struct intel_crtc_state *crtc_state
> plane_state->hw.rotation = from_plane_state->uapi.rotation;
> plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
> plane_state->hw.color_range = from_plane_state->uapi.color_range;
> +
> + plane_state->uapi.src = drm_plane_state_src(&from_plane_state->uapi);
> + plane_state->uapi.dst = drm_plane_state_dest(&from_plane_state->uapi);
> }
>
> void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> @@ -519,6 +522,63 @@ void i9xx_update_planes_on_crtc(struct intel_atomic_state *state,
> }
> }
>
> +int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
> + struct intel_crtc_state *crtc_state,
> + int min_scale, int max_scale,
> + bool can_position)
> +{
> + struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct drm_rect *src = &plane_state->uapi.src;
> + struct drm_rect *dst = &plane_state->uapi.dst;
> + unsigned int rotation = plane_state->uapi.rotation;
hw.rotation
The rest seems consistent.
> + struct drm_rect clip = {};
> + int hscale, vscale;
> +
> + if (!fb) {
> + plane_state->uapi.visible = false;
> + return 0;
> + }
> +
> + drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);
> +
> + /* Check scaling */
> + hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale);
> + vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
> + if (hscale < 0 || vscale < 0) {
> + DRM_DEBUG_KMS("Invalid scaling of plane\n");
> + drm_rect_debug_print("src: ", src, true);
> + drm_rect_debug_print("dst: ", dst, false);
> + return -ERANGE;
> + }
> +
> + if (crtc_state->hw.enable) {
> + clip.x2 = crtc_state->pipe_src_w;
> + clip.y2 = crtc_state->pipe_src_h;
> + }
> +
> + /* right side of the image is on the slave crtc, adjust dst to match */
> + if (crtc_state->bigjoiner_slave)
> + drm_rect_translate(dst, -crtc_state->pipe_src_w, 0);
> +
> + /*
> + * FIXME: This might need further adjustment for seamless scaling
> + * with phase information, for the 2p2 and 2p1 scenarios.
> + */
> + plane_state->uapi.visible = drm_rect_clip_scaled(src, dst, &clip);
> +
> + drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation);
> +
> + if (!can_position && plane_state->uapi.visible &&
> + !drm_rect_equals(dst, &clip)) {
> + DRM_DEBUG_KMS("Plane must cover entire CRTC\n");
> + drm_rect_debug_print("dst: ", dst, false);
> + drm_rect_debug_print("clip: ", &clip, false);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
> .prepare_fb = intel_prepare_plane_fb,
> .cleanup_fb = intel_cleanup_plane_fb,
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index c2a1e7c86e6c..d0a599d00ecd 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -53,6 +53,10 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
> int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,
> struct intel_plane *plane,
> bool *need_cdclk_calc);
> +int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
> + struct intel_crtc_state *crtc_state,
> + int min_scale, int max_scale,
> + bool can_position);
> void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> struct intel_plane_state *plane_state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d5a6f07bb674..357cc2bce300 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4409,12 +4409,10 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state,
> if (ret)
> return ret;
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - DRM_PLANE_HELPER_NO_SCALING,
> - DRM_PLANE_HELPER_NO_SCALING,
> - i9xx_plane_has_windowing(plane),
> - true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + i9xx_plane_has_windowing(plane));
> if (ret)
> return ret;
>
> @@ -11611,11 +11609,10 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> return -EINVAL;
> }
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - DRM_PLANE_HELPER_NO_SCALING,
> - DRM_PLANE_HELPER_NO_SCALING,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + true);
> if (ret)
> return ret;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 2da11ab6343c..9e235210adc7 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -2047,10 +2047,8 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state,
> }
> }
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - min_scale, max_scale,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + min_scale, max_scale, true);
> if (ret)
> return ret;
>
> @@ -2105,11 +2103,10 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state,
> if (ret)
> return ret;
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - DRM_PLANE_HELPER_NO_SCALING,
> - DRM_PLANE_HELPER_NO_SCALING,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + true);
> if (ret)
> return ret;
>
> @@ -2316,10 +2313,8 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state,
> max_scale = skl_plane_max_scale(dev_priv, fb);
> }
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - min_scale, max_scale,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + min_scale, max_scale, true);
> if (ret)
> return ret;
>
> --
> 2.19.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-10-19 16:20 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-08 21:45 [Intel-gfx] [PATCH v10 01/11] HAX to make DSC work on the icelake test system Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 02/11] drm/i915/display: Rename pipe_timings to transcoder_timings Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 03/11] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3 Manasi Navare
2020-10-14 11:26 ` Ville Syrjälä
2020-10-14 19:04 ` Navare, Manasi
2020-10-15 11:52 ` Ville Syrjälä
2020-10-15 16:26 ` Navare, Manasi
2020-10-19 16:30 ` Ville Syrjälä
2020-10-19 22:51 ` Navare, Manasi
2020-10-20 18:39 ` Ville Syrjälä
2020-10-20 18:53 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 05/11] drm/i915: Try to make bigjoiner work in atomic check Manasi Navare
2020-10-14 11:33 ` Ville Syrjälä
2020-10-14 19:09 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences Manasi Navare
2020-10-14 11:07 ` Jani Nikula
2020-10-15 13:07 ` Ville Syrjälä
2020-10-15 16:37 ` Navare, Manasi
2020-10-16 16:06 ` Ville Syrjälä
2020-10-16 18:17 ` Navare, Manasi
2020-10-16 18:50 ` Ville Syrjälä
2020-10-16 19:24 ` Navare, Manasi
2020-10-19 11:34 ` Jani Nikula
2020-10-19 22:53 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 07/11] drm/i915: Make hardware readout work on i915 Manasi Navare
2020-10-19 16:36 ` Ville Syrjälä
2020-10-19 22:45 ` Navare, Manasi
2020-10-20 18:45 ` Ville Syrjälä
2020-10-20 18:57 ` Navare, Manasi
2020-10-20 21:57 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 08/11] drm/i915: Link planes in a bigjoiner configuration, v3 Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 09/11] drm/i915: Add bigjoiner aware plane clipping checks Manasi Navare
2020-10-19 16:20 ` Ville Syrjälä [this message]
2020-10-19 22:56 ` Navare, Manasi
2020-10-20 18:51 ` Ville Syrjälä
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 10/11] drm/i915: Ensure correct master/slave enable/disable sequence Manasi Navare
2020-10-19 16:26 ` Ville Syrjälä
2020-10-19 23:05 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 11/11] drm/i915: Add debugfs dumping for bigjoiner, v3 Manasi Navare
2020-10-08 22:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system Patchwork
2020-10-08 22:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-08 22:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-09 1:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-10-13 19:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system (rev2) Patchwork
2020-10-13 19:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-13 19:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-14 14:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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