* [Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
@ 2020-11-03 18:34 Ville Syrjala
2020-11-03 18:34 ` [Intel-gfx] [PATCH 2/3] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Ville Syrjala @ 2020-11-03 18:34 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass the whole intel_atomic_state to skl_build_pipe_wm() so we
can start to iterate stuff containerd in the commit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f54375b11964..47b27ee54568 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5583,9 +5583,12 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
return 0;
}
-static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state)
+static int skl_build_pipe_wm(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
struct intel_plane *plane;
const struct intel_plane_state *plane_state;
@@ -6092,7 +6095,6 @@ skl_compute_wm(struct intel_atomic_state *state)
{
struct intel_crtc *crtc;
struct intel_crtc_state *new_crtc_state;
- struct intel_crtc_state *old_crtc_state;
int ret, i;
ret = skl_ddb_add_affected_pipes(state);
@@ -6104,9 +6106,8 @@ skl_compute_wm(struct intel_atomic_state *state)
* Note that skl_ddb_add_affected_pipes may have added more CRTC's that
* weren't otherwise being modified if pipe allocations had to change.
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
- ret = skl_build_pipe_wm(new_crtc_state);
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ ret = skl_build_pipe_wm(state, crtc);
if (ret)
return ret;
}
@@ -6124,8 +6125,7 @@ skl_compute_wm(struct intel_atomic_state *state)
* based on how much ddb is available. Now we can actually
* check if the final watermarks changed.
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
ret = skl_wm_add_affected_planes(state, crtc);
if (ret)
return ret;
--
2.26.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH 2/3] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code
2020-11-03 18:34 [Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Ville Syrjala
@ 2020-11-03 18:34 ` Ville Syrjala
2020-11-03 18:34 ` [Intel-gfx] [PATCH 3/3] drm/i915: Pimp the watermark documentation a bit Ville Syrjala
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Ville Syrjala @ 2020-11-03 18:34 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_atomic_crtc_state_for_each_plane_state() peeks at the
plane's current state without holding the plane's mutex, trusting
that the crtc's mutex will protect it. In practice that does work
since our planes can't move between pipes, but it sets a bad
example. intel_atomic_crtc_state_for_each_plane_state() also
relies on crtc_state.uapi.plane_mask which may be full of lies
when it comes to the bigjoiner stuff, so soon we can't use it as
is anyway. So best to just get rid of it entirely. Which we can
easily do by swithcing to the g4x/vlv "raw" watermark approach.
Later on we should even be able to move the "raw" watermark
computation into the normal .plane_check() code, leaving only
the merging/clamping of the final watermarks to the later
stages. But that will require adjusting the ilk+ wm code
similarly as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 +
drivers/gpu/drm/i915/intel_pm.c | 41 +++++++++++--------
2 files changed, 27 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index f6f0626649e0..6b249969c394 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -755,6 +755,8 @@ struct intel_crtc_wm_state {
} ilk;
struct {
+ /* "raw" watermarks */
+ struct skl_pipe_wm raw;
/* gen9+ only needs 1-step wm programming */
struct skl_pipe_wm optimal;
struct skl_ddb_entry ddb;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 47b27ee54568..6b4838efcd59 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5478,7 +5478,7 @@ static int skl_build_plane_wm_single(struct intel_crtc_state *crtc_state,
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct skl_plane_wm *wm = &crtc_state->wm.skl.optimal.planes[plane_id];
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
struct skl_wm_params wm_params;
int ret;
@@ -5501,7 +5501,7 @@ static int skl_build_plane_wm_uv(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
enum plane_id plane_id)
{
- struct skl_plane_wm *wm = &crtc_state->wm.skl.optimal.planes[plane_id];
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
struct skl_wm_params wm_params;
int ret;
@@ -5522,10 +5522,13 @@ static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
enum plane_id plane_id = plane->id;
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
int ret;
+ memset(wm, 0, sizeof(*wm));
+
if (!intel_wm_plane_visible(crtc_state, plane_state))
return 0;
@@ -5547,10 +5550,14 @@ static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- enum plane_id plane_id = to_intel_plane(plane_state->uapi.plane)->id;
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum plane_id plane_id = plane->id;
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
int ret;
+ memset(wm, 0, sizeof(*wm));
+
/* Watermarks calculated in master */
if (plane_state->planar_slave)
return 0;
@@ -5589,19 +5596,18 @@ static int skl_build_pipe_wm(struct intel_atomic_state *state,
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
- struct intel_plane *plane;
const struct intel_plane_state *plane_state;
- int ret;
+ struct intel_plane *plane;
+ int ret, i;
- /*
- * We'll only calculate watermarks for planes that are actually
- * enabled, so make sure all other planes are set as disabled.
- */
- memset(pipe_wm->planes, 0, sizeof(pipe_wm->planes));
-
- intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
- crtc_state) {
+ for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
+ /*
+ * FIXME should perhaps check {old,new}_plane_crtc->hw.crtc
+ * instead but we don't populate that correctly for NV12 Y
+ * planes so for now hack this.
+ */
+ if (plane->pipe != crtc->pipe)
+ continue;
if (INTEL_GEN(dev_priv) >= 11)
ret = icl_build_plane_wm(crtc_state, plane_state);
@@ -5611,6 +5617,8 @@ static int skl_build_pipe_wm(struct intel_atomic_state *state,
return ret;
}
+ crtc_state->wm.skl.optimal = crtc_state->wm.skl.raw;
+
return 0;
}
@@ -6271,6 +6279,7 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv)
crtc_state = to_intel_crtc_state(crtc->base.state);
skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal);
+ crtc_state->wm.skl.raw = crtc_state->wm.skl.optimal;
}
if (dev_priv->active_pipes) {
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915: Pimp the watermark documentation a bit
2020-11-03 18:34 [Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Ville Syrjala
2020-11-03 18:34 ` [Intel-gfx] [PATCH 2/3] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
@ 2020-11-03 18:34 ` Ville Syrjala
2020-11-03 18:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Ville Syrjala @ 2020-11-03 18:34 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Document what each of the "raw" vs. "optimal" vs. "intermediate"
watermarks do.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_types.h | 48 ++++++++++---------
1 file changed, 25 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 6b249969c394..b977e70e34d7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -737,25 +737,34 @@ struct g4x_wm_state {
struct intel_crtc_wm_state {
union {
+ /*
+ * raw:
+ * The "raw" watermark values produced by the formula
+ * given the plane's current state. They do not consider
+ * how much FIFO is actually allocated for each plane.
+ *
+ * optimal:
+ * The "optimal" watermark values given the current
+ * state of the planes and the amount of FIFO
+ * allocated to each, ignoring any previous state
+ * of the planes.
+ *
+ * intermediate:
+ * The "intermediate" watermark values when transitioning
+ * between the old and new "optimal" values. Used when
+ * the watermark registers are single buffered and hence
+ * their state changes asynchronously with regards to the
+ * actual plane registers. These are essentially the
+ * worst case combination of the old and new "optimal"
+ * watermarks, which are therefore safe to use when the
+ * plane is in either its old or new state.
+ */
struct {
- /*
- * Intermediate watermarks; these can be
- * programmed immediately since they satisfy
- * both the current configuration we're
- * switching away from and the new
- * configuration we're switching to.
- */
struct intel_pipe_wm intermediate;
-
- /*
- * Optimal watermarks, programmed post-vblank
- * when this state is committed.
- */
struct intel_pipe_wm optimal;
} ilk;
struct {
- /* "raw" watermarks */
struct skl_pipe_wm raw;
/* gen9+ only needs 1-step wm programming */
struct skl_pipe_wm optimal;
@@ -765,22 +774,15 @@ struct intel_crtc_wm_state {
} skl;
struct {
- /* "raw" watermarks (not inverted) */
- struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS];
- /* intermediate watermarks (inverted) */
- struct vlv_wm_state intermediate;
- /* optimal watermarks (inverted) */
- struct vlv_wm_state optimal;
- /* display FIFO split */
+ struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS]; /* not inverted */
+ struct vlv_wm_state intermediate; /* inverted */
+ struct vlv_wm_state optimal; /* inverted */
struct vlv_fifo_state fifo_state;
} vlv;
struct {
- /* "raw" watermarks */
struct g4x_pipe_wm raw[NUM_G4X_WM_LEVELS];
- /* intermediate watermarks */
struct g4x_wm_state intermediate;
- /* optimal watermarks */
struct g4x_wm_state optimal;
} g4x;
};
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
2020-11-03 18:34 [Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Ville Syrjala
2020-11-03 18:34 ` [Intel-gfx] [PATCH 2/3] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
2020-11-03 18:34 ` [Intel-gfx] [PATCH 3/3] drm/i915: Pimp the watermark documentation a bit Ville Syrjala
@ 2020-11-03 18:48 ` Patchwork
2020-11-03 19:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-04 1:13 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-11-03 18:48 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
URL : https://patchwork.freedesktop.org/series/83445/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
32d744b404ab drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
82fba54d07f0 drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code
-:18: WARNING:TYPO_SPELLING: 'swithcing' may be misspelled - perhaps 'switching'?
#18:
easily do by swithcing to the g4x/vlv "raw" watermark approach.
total: 0 errors, 1 warnings, 0 checks, 98 lines checked
04db1efa9d4d drm/i915: Pimp the watermark documentation a bit
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
2020-11-03 18:34 [Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Ville Syrjala
` (2 preceding siblings ...)
2020-11-03 18:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Patchwork
@ 2020-11-03 19:07 ` Patchwork
2020-11-04 1:13 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-11-03 19:07 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4294 bytes --]
== Series Details ==
Series: series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
URL : https://patchwork.freedesktop.org/series/83445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9256 -> Patchwork_18844
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/index.html
New tests
---------
New tests have been introduced between CI_DRM_9256 and Patchwork_18844:
### New CI tests (1) ###
* boot:
- Statuses : 38 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18844 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/fi-icl-u2/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/fi-icl-u2/igt@core_hotunplug@unbind-rebind.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-byt-j1900: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
#### Possible fixes ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live@gt_timelines:
- fi-apl-guc: [INCOMPLETE][7] ([i915#1635]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/fi-apl-guc/igt@i915_selftest@live@gt_timelines.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/fi-apl-guc/igt@i915_selftest@live@gt_timelines.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- {fi-kbl-7560u}: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-icl-u2: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12] +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
Participating hosts (43 -> 38)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9256 -> Patchwork_18844
CI-20190529: 20190529
CI_DRM_9256: f6c52739f73952279713aec3c98d9805e1c1a3ae @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5831: b6247cc06d76b48ec2a3a0b13ffbd25aec8a42ff @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18844: 04db1efa9d4d3890b476e7da849620ed187c37e1 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
04db1efa9d4d drm/i915: Pimp the watermark documentation a bit
82fba54d07f0 drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code
32d744b404ab drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/index.html
[-- Attachment #1.2: Type: text/html, Size: 5364 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
2020-11-03 18:34 [Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Ville Syrjala
` (3 preceding siblings ...)
2020-11-03 19:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-11-04 1:13 ` Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-11-04 1:13 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 16916 bytes --]
== Series Details ==
Series: series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
URL : https://patchwork.freedesktop.org/series/83445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9256_full -> Patchwork_18844_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
New tests
---------
New tests have been introduced between CI_DRM_9256_full and Patchwork_18844_full:
### New CI tests (1) ###
* boot:
- Statuses : 175 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18844_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload:
- shard-tglb: [PASS][1] -> [DMESG-WARN][2] ([i915#1982]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-tglb6/igt@i915_module_load@reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-tglb5/igt@i915_module_load@reload.html
- shard-iclb: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-iclb4/igt@i915_module_load@reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-iclb6/igt@i915_module_load@reload.html
* igt@i915_pm_rpm@i2c:
- shard-skl: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +10 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl4/igt@i915_pm_rpm@i2c.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl10/igt@i915_pm_rpm@i2c.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- shard-glk: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-glk9/igt@i915_pm_rpm@modeset-non-lpsp.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-glk5/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@kms_cursor_crc@pipe-c-cursor-64x21-offscreen:
- shard-skl: [PASS][9] -> [FAIL][10] ([i915#54]) +3 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-64x21-offscreen.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-64x21-offscreen.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-apl: [PASS][11] -> [DMESG-WARN][12] ([i915#1635] / [i915#1982]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-apl2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-apl8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: [PASS][13] -> [FAIL][14] ([i915#79])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-fb-recreate@c-edp1:
- shard-skl: [PASS][15] -> [FAIL][16] ([i915#2122])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl1/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl2/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-glk: [PASS][17] -> [FAIL][18] ([i915#49])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-glk4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-glk5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145] / [i915#265])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][21] -> [DMESG-FAIL][22] ([fdo#108145] / [i915#1982])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-iclb3/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_universal_plane@universal-plane-gen9-features-pipe-a:
- shard-kbl: [PASS][25] -> [DMESG-WARN][26] ([i915#1982]) +3 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-kbl6/igt@kms_universal_plane@universal-plane-gen9-features-pipe-a.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-kbl3/igt@kms_universal_plane@universal-plane-gen9-features-pipe-a.html
#### Possible fixes ####
* igt@gem_caching@writes:
- shard-skl: [DMESG-WARN][27] ([i915#1982]) -> [PASS][28] +4 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl7/igt@gem_caching@writes.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl8/igt@gem_caching@writes.html
* igt@gem_eio@unwedge-stress:
- shard-snb: [INCOMPLETE][29] ([i915#82]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-snb6/igt@gem_eio@unwedge-stress.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-snb2/igt@gem_eio@unwedge-stress.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][31] ([i915#2190]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-tglb6/igt@gem_huc_copy@huc-copy.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-tglb5/igt@gem_huc_copy@huc-copy.html
* igt@gen9_exec_parse@allowed-all:
- shard-skl: [DMESG-WARN][33] ([i915#1436] / [i915#716]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl9/igt@gen9_exec_parse@allowed-all.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl7/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [FAIL][35] ([i915#454]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-skl: [DMESG-FAIL][37] ([i915#541]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl7/igt@i915_selftest@live@gt_heartbeat.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl7/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_suspend@fence-restore-untiled:
- shard-skl: [INCOMPLETE][39] ([i915#198]) -> [PASS][40] +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl3/igt@i915_suspend@fence-restore-untiled.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl4/igt@i915_suspend@fence-restore-untiled.html
* {igt@kms_async_flips@async-flip-with-page-flip-events}:
- shard-iclb: [FAIL][41] ([i915#2521]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-iclb3/igt@kms_async_flips@async-flip-with-page-flip-events.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-iclb6/igt@kms_async_flips@async-flip-with-page-flip-events.html
* {igt@kms_async_flips@test-time-stamp}:
- shard-tglb: [FAIL][43] ([i915#2597]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-tglb1/igt@kms_async_flips@test-time-stamp.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-tglb1/igt@kms_async_flips@test-time-stamp.html
* igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge:
- shard-glk: [DMESG-WARN][45] ([i915#1982]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-glk3/igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-glk5/igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][47] ([i915#2346]) -> [PASS][48] +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][49] ([i915#2122]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-glk3/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-glk5/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-tglb: [FAIL][51] ([i915#2598]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-tglb2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-tglb2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt:
- shard-snb: [FAIL][53] ([i915#2546]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-snb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-snb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite:
- shard-tglb: [DMESG-WARN][55] ([i915#1982]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-kbl: [DMESG-WARN][57] ([i915#1982]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-stridechange.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-stridechange.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][59] ([fdo#108145] / [i915#265]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][61] ([fdo#109642] / [fdo#111068]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-iclb4/igt@kms_psr2_su@frontbuffer.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [SKIP][63] ([fdo#109441]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@prime_mmap@test_map_unmap:
- shard-iclb: [DMESG-WARN][65] ([i915#1982]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-iclb5/igt@prime_mmap@test_map_unmap.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-iclb1/igt@prime_mmap@test_map_unmap.html
* igt@sysfs_timeslice_duration@invalid@rcs0:
- shard-apl: [DMESG-WARN][67] ([i915#1635] / [i915#1982]) -> [PASS][68] +2 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-apl8/igt@sysfs_timeslice_duration@invalid@rcs0.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-apl8/igt@sysfs_timeslice_duration@invalid@rcs0.html
#### Warnings ####
* igt@runner@aborted:
- shard-glk: ([FAIL][69], [FAIL][70]) ([i915#1611] / [i915#1814] / [i915#483] / [k.org#202321]) -> [FAIL][71] ([i915#1814] / [i915#483] / [k.org#202321])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-glk7/igt@runner@aborted.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-glk8/igt@runner@aborted.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-glk7/igt@runner@aborted.html
- shard-skl: ([FAIL][72], [FAIL][73]) ([i915#1436] / [i915#483]) -> [FAIL][74] ([i915#1436])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl9/igt@runner@aborted.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9256/shard-skl6/igt@runner@aborted.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/shard-skl2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1611]: https://gitlab.freedesktop.org/drm/intel/issues/1611
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2546]: https://gitlab.freedesktop.org/drm/intel/issues/2546
[i915#2597]: https://gitlab.freedesktop.org/drm/intel/issues/2597
[i915#2598]: https://gitlab.freedesktop.org/drm/intel/issues/2598
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9256 -> Patchwork_18844
CI-20190529: 20190529
CI_DRM_9256: f6c52739f73952279713aec3c98d9805e1c1a3ae @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5831: b6247cc06d76b48ec2a3a0b13ffbd25aec8a42ff @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18844: 04db1efa9d4d3890b476e7da849620ed187c37e1 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18844/index.html
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-11-04 1:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-11-03 18:34 [Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Ville Syrjala
2020-11-03 18:34 ` [Intel-gfx] [PATCH 2/3] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
2020-11-03 18:34 ` [Intel-gfx] [PATCH 3/3] drm/i915: Pimp the watermark documentation a bit Ville Syrjala
2020-11-03 18:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() Patchwork
2020-11-03 19:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-04 1:13 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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