From: "Navare, Manasi" <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/6] drm/i915: Pass intel_atomic_state around
Date: Mon, 9 Nov 2020 13:47:52 -0800 [thread overview]
Message-ID: <20201109214752.GB17448@labuser-Z97X-UD5H> (raw)
In-Reply-To: <20201106173042.7534-2-ville.syrjala@linux.intel.com>
On Fri, Nov 06, 2020 at 07:30:37PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Pass the whole intel_atomic_state to skl_build_pipe_wm()
> and skl_allocate_pipe_ddb() so we can start to iterate
> stuff containerd in the commit.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
This looks good to me,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/intel_pm.c | 24 +++++++++++++-----------
> 1 file changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index f54375b11964..e9ac6f1a5d28 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4791,9 +4791,11 @@ skl_plane_wm_level(const struct intel_crtc_state *crtc_state,
> }
>
> static int
> -skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
> +skl_allocate_pipe_ddb(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> struct skl_ddb_entry *alloc = &crtc_state->wm.skl.ddb;
> u16 alloc_size, start = 0;
> @@ -5583,9 +5585,12 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
> return 0;
> }
>
> -static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state)
> +static int skl_build_pipe_wm(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
> struct intel_plane *plane;
> const struct intel_plane_state *plane_state;
> @@ -5794,7 +5799,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
>
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
> - ret = skl_allocate_pipe_ddb(new_crtc_state);
> + ret = skl_allocate_pipe_ddb(state, crtc);
> if (ret)
> return ret;
>
> @@ -6092,7 +6097,6 @@ skl_compute_wm(struct intel_atomic_state *state)
> {
> struct intel_crtc *crtc;
> struct intel_crtc_state *new_crtc_state;
> - struct intel_crtc_state *old_crtc_state;
> int ret, i;
>
> ret = skl_ddb_add_affected_pipes(state);
> @@ -6104,9 +6108,8 @@ skl_compute_wm(struct intel_atomic_state *state)
> * Note that skl_ddb_add_affected_pipes may have added more CRTC's that
> * weren't otherwise being modified if pipe allocations had to change.
> */
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> - ret = skl_build_pipe_wm(new_crtc_state);
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + ret = skl_build_pipe_wm(state, crtc);
> if (ret)
> return ret;
> }
> @@ -6124,8 +6127,7 @@ skl_compute_wm(struct intel_atomic_state *state)
> * based on how much ddb is available. Now we can actually
> * check if the final watermarks changed.
> */
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> ret = skl_wm_add_affected_planes(state, crtc);
> if (ret)
> return ret;
> --
> 2.26.2
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2020-11-09 21:45 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-06 17:30 [Intel-gfx] [PATCH 0/6] drm/i915: Eliminate intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
2020-11-06 17:30 ` [Intel-gfx] [PATCH 1/6] drm/i915: Pass intel_atomic_state around Ville Syrjala
2020-11-09 21:47 ` Navare, Manasi [this message]
2020-11-06 17:30 ` [Intel-gfx] [PATCH 2/6] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
2020-11-11 22:22 ` Lisovskiy, Stanislav
2020-11-06 17:30 ` [Intel-gfx] [PATCH 3/6] drm/i915: Pimp the watermark documentation a bit Ville Syrjala
2020-11-11 22:51 ` Navare, Manasi
2020-11-06 17:30 ` [Intel-gfx] [PATCH 4/6] drm/i915: Precompute can_sagv for each wm level Ville Syrjala
2020-11-12 13:59 ` Lisovskiy, Stanislav
2020-11-13 14:55 ` Ville Syrjälä
2020-11-06 17:30 ` [Intel-gfx] [PATCH 5/6] drm/i915: Store plane relative data rate in crtc_state Ville Syrjala
2020-11-13 15:26 ` Lisovskiy, Stanislav
2020-11-06 17:30 ` [Intel-gfx] [PATCH 6/6] drm/i915: Remove skl_adjusted_plane_pixel_rate() Ville Syrjala
2020-11-13 15:24 ` Lisovskiy, Stanislav
2020-11-06 18:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Eliminate intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Patchwork
2020-11-06 18:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-11-13 21:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Eliminate intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code (rev2) Patchwork
2020-11-13 22:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-14 2:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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