* [Intel-gfx] [CI 1/2] drm/i915/gem: Allow backends to override pread implementation
@ 2020-11-05 15:49 Chris Wilson
2020-11-05 15:49 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Chris Wilson @ 2020-11-05 15:49 UTC (permalink / raw)
To: intel-gfx
From: Matthew Auld <matthew.auld@intel.com>
As there are more and more complicated interactions between the different
backing stores and userspace, push the control into the backends rather
than accumulate them all inside the ioctl handlers.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 2 ++
drivers/gpu/drm/i915/i915_gem.c | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index fedfebf13344..e2d9b7e1e152 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -56,6 +56,8 @@ struct drm_i915_gem_object_ops {
void (*truncate)(struct drm_i915_gem_object *obj);
void (*writeback)(struct drm_i915_gem_object *obj);
+ int (*pread)(struct drm_i915_gem_object *obj,
+ const struct drm_i915_gem_pread *arg);
int (*pwrite)(struct drm_i915_gem_object *obj,
const struct drm_i915_gem_pwrite *arg);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index bb0c12975f38..d58fe1ddc3e1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -527,6 +527,12 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
trace_i915_gem_object_pread(obj, args->offset, args->size);
+ ret = -ENODEV;
+ if (obj->ops->pread)
+ ret = obj->ops->pread(obj, args);
+ if (ret != -ENODEV)
+ goto out;
+
ret = i915_gem_object_wait(obj,
I915_WAIT_INTERRUPTIBLE,
MAX_SCHEDULE_TIMEOUT);
--
2.20.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend 2020-11-05 15:49 [Intel-gfx] [CI 1/2] drm/i915/gem: Allow backends to override pread implementation Chris Wilson @ 2020-11-05 15:49 ` Chris Wilson 2020-11-05 18:41 ` Chris Wilson 2020-11-09 13:41 ` Ruhl, Michael J 2020-11-05 17:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation Patchwork ` (2 subsequent siblings) 3 siblings, 2 replies; 8+ messages in thread From: Chris Wilson @ 2020-11-05 15:49 UTC (permalink / raw) To: intel-gfx Move the specialised interactions with the physical GEM object from the pread/pwrite ioctl handler into the phys backend. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_phys.c | 55 ++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gem.c | 26 ----------- 2 files changed, 55 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/i915_gem_phys.c index 28147aab47b9..3a4dfe2ef1da 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c @@ -134,6 +134,58 @@ i915_gem_object_put_pages_phys(struct drm_i915_gem_object *obj, vaddr, dma); } +static int +phys_pwrite(struct drm_i915_gem_object *obj, + const struct drm_i915_gem_pwrite *args) +{ + void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; + char __user *user_data = u64_to_user_ptr(args->data_ptr); + int err; + + err = i915_gem_object_wait(obj, + I915_WAIT_INTERRUPTIBLE | + I915_WAIT_ALL, + MAX_SCHEDULE_TIMEOUT); + if (err) + return err; + + /* + * We manually control the domain here and pretend that it + * remains coherent i.e. in the GTT domain, like shmem_pwrite. + */ + i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU); + + if (copy_from_user(vaddr, user_data, args->size)) + return -EFAULT; + + drm_clflush_virt_range(vaddr, args->size); + intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt); + + i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU); + return 0; +} + +static int +phys_pread(struct drm_i915_gem_object *obj, + const struct drm_i915_gem_pread *args) +{ + void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; + char __user *user_data = u64_to_user_ptr(args->data_ptr); + int err; + + err = i915_gem_object_wait(obj, + I915_WAIT_INTERRUPTIBLE, + MAX_SCHEDULE_TIMEOUT); + if (err) + return err; + + drm_clflush_virt_range(vaddr, args->size); + if (copy_to_user(user_data, vaddr, args->size)) + return -EFAULT; + + return 0; +} + static void phys_release(struct drm_i915_gem_object *obj) { fput(obj->base.filp); @@ -144,6 +196,9 @@ static const struct drm_i915_gem_object_ops i915_gem_phys_ops = { .get_pages = i915_gem_object_get_pages_phys, .put_pages = i915_gem_object_put_pages_phys, + .pread = phys_pread, + .pwrite = phys_pwrite, + .release = phys_release, }; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index d58fe1ddc3e1..58276694c848 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -179,30 +179,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj, return ret; } -static int -i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, - struct drm_i915_gem_pwrite *args, - struct drm_file *file) -{ - void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; - char __user *user_data = u64_to_user_ptr(args->data_ptr); - - /* - * We manually control the domain here and pretend that it - * remains coherent i.e. in the GTT domain, like shmem_pwrite. - */ - i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU); - - if (copy_from_user(vaddr, user_data, args->size)) - return -EFAULT; - - drm_clflush_virt_range(vaddr, args->size); - intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt); - - i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU); - return 0; -} - static int i915_gem_create(struct drm_file *file, struct intel_memory_region *mr, @@ -872,8 +848,6 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, if (ret == -EFAULT || ret == -ENOSPC) { if (i915_gem_object_has_struct_page(obj)) ret = i915_gem_shmem_pwrite(obj, args); - else - ret = i915_gem_phys_pwrite(obj, args, file); } i915_gem_object_unpin_pages(obj); -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend 2020-11-05 15:49 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend Chris Wilson @ 2020-11-05 18:41 ` Chris Wilson 2020-11-10 7:03 ` Rodrigo Vivi 2020-11-09 13:41 ` Ruhl, Michael J 1 sibling, 1 reply; 8+ messages in thread From: Chris Wilson @ 2020-11-05 18:41 UTC (permalink / raw) To: intel-gfx Quoting Chris Wilson (2020-11-05 15:49:34) > Move the specialised interactions with the physical GEM object from the > pread/pwrite ioctl handler into the phys backend. > Fixes: c6790dc22312 ("drm/i915: Wean off drm_pci_alloc/drm_pci_free") Testcase: igt/gem_pwrite/exhaustion > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Reviewed-by: Matthew Auld <matthew.auld@intel.com> Cc: stable@vger.kernel.org -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend 2020-11-05 18:41 ` Chris Wilson @ 2020-11-10 7:03 ` Rodrigo Vivi 0 siblings, 0 replies; 8+ messages in thread From: Rodrigo Vivi @ 2020-11-10 7:03 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx On Thu, Nov 05, 2020 at 06:41:25PM +0000, Chris Wilson wrote: > Quoting Chris Wilson (2020-11-05 15:49:34) > > Move the specialised interactions with the physical GEM object from the > > pread/pwrite ioctl handler into the phys backend. which depends on the backend... > > > > Fixes: c6790dc22312 ("drm/i915: Wean off drm_pci_alloc/drm_pci_free") which was a fixes to 4.5 stable, but I could only find it into 5.4+ so... > Testcase: igt/gem_pwrite/exhaustion > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Reviewed-by: Matthew Auld <matthew.auld@intel.com> > Cc: stable@vger.kernel.org When cherry-picking to drm-intel-fixes, should I add Cc: stable@vger.kernel.org # 5.4.y: c6790dc22312: drm/i915: Wean off drm_pci_alloc/drm_pci_free Cc: stable@vger.kernel.org # 5.4.y > -Chris > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend 2020-11-05 15:49 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend Chris Wilson 2020-11-05 18:41 ` Chris Wilson @ 2020-11-09 13:41 ` Ruhl, Michael J 1 sibling, 0 replies; 8+ messages in thread From: Ruhl, Michael J @ 2020-11-09 13:41 UTC (permalink / raw) To: Chris Wilson, intel-gfx@lists.freedesktop.org >-----Original Message----- >From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Chris >Wilson >Sent: Thursday, November 5, 2020 10:50 AM >To: intel-gfx@lists.freedesktop.org >Subject: [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite >implementations to the backend > >Move the specialised interactions with the physical GEM object from the >pread/pwrite ioctl handler into the phys backend. > >Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> >Reviewed-by: Matthew Auld <matthew.auld@intel.com> >--- > drivers/gpu/drm/i915/gem/i915_gem_phys.c | 55 >++++++++++++++++++++++++ > drivers/gpu/drm/i915/i915_gem.c | 26 ----------- > 2 files changed, 55 insertions(+), 26 deletions(-) > >diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c >b/drivers/gpu/drm/i915/gem/i915_gem_phys.c >index 28147aab47b9..3a4dfe2ef1da 100644 >--- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c >+++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c >@@ -134,6 +134,58 @@ i915_gem_object_put_pages_phys(struct >drm_i915_gem_object *obj, > vaddr, dma); > } > >+static int >+phys_pwrite(struct drm_i915_gem_object *obj, >+ const struct drm_i915_gem_pwrite *args) >+{ >+ void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; >+ char __user *user_data = u64_to_user_ptr(args->data_ptr); >+ int err; >+ >+ err = i915_gem_object_wait(obj, >+ I915_WAIT_INTERRUPTIBLE | >+ I915_WAIT_ALL, >+ MAX_SCHEDULE_TIMEOUT); >+ if (err) >+ return err; >+ >+ /* >+ * We manually control the domain here and pretend that it >+ * remains coherent i.e. in the GTT domain, like shmem_pwrite. >+ */ >+ i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU); >+ >+ if (copy_from_user(vaddr, user_data, args->size)) >+ return -EFAULT; >+ >+ drm_clflush_virt_range(vaddr, args->size); >+ intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt); >+ >+ i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU); >+ return 0; So the original code path (through pwrite_ioctl()) includes a pin/unpin. That doesn't need to be done here? Thanks, Mike >+} >+ >+static int >+phys_pread(struct drm_i915_gem_object *obj, >+ const struct drm_i915_gem_pread *args) >+{ >+ void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; >+ char __user *user_data = u64_to_user_ptr(args->data_ptr); >+ int err; >+ >+ err = i915_gem_object_wait(obj, >+ I915_WAIT_INTERRUPTIBLE, >+ MAX_SCHEDULE_TIMEOUT); >+ if (err) >+ return err; >+ >+ drm_clflush_virt_range(vaddr, args->size); >+ if (copy_to_user(user_data, vaddr, args->size)) >+ return -EFAULT; >+ >+ return 0; >+} >+ > static void phys_release(struct drm_i915_gem_object *obj) > { > fput(obj->base.filp); >@@ -144,6 +196,9 @@ static const struct drm_i915_gem_object_ops >i915_gem_phys_ops = { > .get_pages = i915_gem_object_get_pages_phys, > .put_pages = i915_gem_object_put_pages_phys, > >+ .pread = phys_pread, >+ .pwrite = phys_pwrite, >+ > .release = phys_release, > }; > >diff --git a/drivers/gpu/drm/i915/i915_gem.c >b/drivers/gpu/drm/i915/i915_gem.c >index d58fe1ddc3e1..58276694c848 100644 >--- a/drivers/gpu/drm/i915/i915_gem.c >+++ b/drivers/gpu/drm/i915/i915_gem.c >@@ -179,30 +179,6 @@ int i915_gem_object_unbind(struct >drm_i915_gem_object *obj, > return ret; > } > >-static int >-i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, >- struct drm_i915_gem_pwrite *args, >- struct drm_file *file) >-{ >- void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; >- char __user *user_data = u64_to_user_ptr(args->data_ptr); >- >- /* >- * We manually control the domain here and pretend that it >- * remains coherent i.e. in the GTT domain, like shmem_pwrite. >- */ >- i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU); >- >- if (copy_from_user(vaddr, user_data, args->size)) >- return -EFAULT; >- >- drm_clflush_virt_range(vaddr, args->size); >- intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt); >- >- i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU); >- return 0; >-} >- > static int > i915_gem_create(struct drm_file *file, > struct intel_memory_region *mr, >@@ -872,8 +848,6 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void >*data, > if (ret == -EFAULT || ret == -ENOSPC) { > if (i915_gem_object_has_struct_page(obj)) > ret = i915_gem_shmem_pwrite(obj, args); >- else >- ret = i915_gem_phys_pwrite(obj, args, file); > } > > i915_gem_object_unpin_pages(obj); >-- >2.20.1 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation 2020-11-05 15:49 [Intel-gfx] [CI 1/2] drm/i915/gem: Allow backends to override pread implementation Chris Wilson 2020-11-05 15:49 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend Chris Wilson @ 2020-11-05 17:29 ` Patchwork 2020-11-05 17:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-11-05 21:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2020-11-05 17:29 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation URL : https://patchwork.freedesktop.org/series/83541/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_reset.c:1312:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: expected void *in +drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: expected void const *src +drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: warning: incorrect type in argument 2 (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: expected void *in +drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: expected void const *src +drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: warning: incorrect type in argument 2 (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: expected unsigned int [usertype] *s +drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: warning: incorrect type in argument 1 (different address spaces) +drivers/gpu/drm/i915/gvt/mmio.c:290:23: warning: memcpy with byte count of 279040 +drivers/gpu/drm/i915/i915_perf.c:1440:15: warning: memset with byte count of 16777216 +drivers/gpu/drm/i915/i915_perf.c:1494:15: warning: memset with byte count of 16777216 +./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31 +./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31 +./include/linux/seqlock.h:864:16: warning: trying to copy expression type 31 +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation 2020-11-05 15:49 [Intel-gfx] [CI 1/2] drm/i915/gem: Allow backends to override pread implementation Chris Wilson 2020-11-05 15:49 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend Chris Wilson 2020-11-05 17:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation Patchwork @ 2020-11-05 17:57 ` Patchwork 2020-11-05 21:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2020-11-05 17:57 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 5506 bytes --] == Series Details == Series: series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation URL : https://patchwork.freedesktop.org/series/83541/ State : success == Summary == CI Bug Log - changes from CI_DRM_9271 -> Patchwork_18861 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/index.html New tests --------- New tests have been introduced between CI_DRM_9271 and Patchwork_18861: ### New CI tests (1) ### * boot: - Statuses : 41 pass(s) - Exec time: [0.0] s Known issues ------------ Here are the changes found in Patchwork_18861 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_hotunplug@unbind-rebind: - fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#1982]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-tgl-y/igt@core_hotunplug@unbind-rebind.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-tgl-y/igt@core_hotunplug@unbind-rebind.html * igt@i915_pm_rpm@basic-pci-d3-state: - fi-byt-j1900: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@prime_vgem@basic-read: - fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([i915#402]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-tgl-y/igt@prime_vgem@basic-read.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-tgl-y/igt@prime_vgem@basic-read.html #### Possible fixes #### * igt@debugfs_test@read_all_entries: - {fi-kbl-7560u}: [INCOMPLETE][7] ([i915#2417]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html * igt@i915_pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@i915_pm_rpm@module-reload: - fi-skl-lmem: [DMESG-WARN][11] ([i915#2605]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live@gt_heartbeat: - fi-bsw-n3050: [DMESG-FAIL][13] ([i915#541]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-bsw-n3050/igt@i915_selftest@live@gt_heartbeat.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-bsw-n3050/igt@i915_selftest@live@gt_heartbeat.html * igt@kms_busy@basic@flip: - fi-kbl-soraka: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-kbl-soraka/igt@kms_busy@basic@flip.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-kbl-soraka/igt@kms_busy@basic@flip.html * igt@prime_vgem@basic-gtt: - fi-tgl-y: [DMESG-WARN][17] ([i915#402]) -> [PASS][18] +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-tgl-y/igt@prime_vgem@basic-gtt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-tgl-y/igt@prime_vgem@basic-gtt.html #### Warnings #### * igt@debugfs_test@read_all_entries: - fi-tgl-y: [DMESG-WARN][19] ([i915#1982]) -> [DMESG-WARN][20] ([i915#402]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/fi-tgl-y/igt@debugfs_test@read_all_entries.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/fi-tgl-y/igt@debugfs_test@read_all_entries.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2417]: https://gitlab.freedesktop.org/drm/intel/issues/2417 [i915#2605]: https://gitlab.freedesktop.org/drm/intel/issues/2605 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541 Participating hosts (44 -> 41) ------------------------------ Missing (3): fi-bsw-cyan fi-bdw-samus fi-hsw-4200u Build changes ------------- * Linux: CI_DRM_9271 -> Patchwork_18861 CI-20190529: 20190529 CI_DRM_9271: 3e0f3e5a1c3f6fe6e03c1fa210ef262ce03c8148 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5836: 4c2ec0ad123b82f42f9fe2297e1a41fec73c9229 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18861: 5499c92b4eeeca8dbed5eb84ba33e78bb269dca0 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 5499c92b4eee drm/i915/gem: Pull phys pread/pwrite implementations to the backend 97c3323ac37a drm/i915/gem: Allow backends to override pread implementation == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/index.html [-- Attachment #1.2: Type: text/html, Size: 6800 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation 2020-11-05 15:49 [Intel-gfx] [CI 1/2] drm/i915/gem: Allow backends to override pread implementation Chris Wilson ` (2 preceding siblings ...) 2020-11-05 17:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2020-11-05 21:40 ` Patchwork 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2020-11-05 21:40 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 17184 bytes --] == Series Details == Series: series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation URL : https://patchwork.freedesktop.org/series/83541/ State : success == Summary == CI Bug Log - changes from CI_DRM_9271_full -> Patchwork_18861_full ==================================================== Summary ------- **SUCCESS** No regressions found. New tests --------- New tests have been introduced between CI_DRM_9271_full and Patchwork_18861_full: ### New CI tests (1) ### * boot: - Statuses : 199 pass(s) - Exec time: [0.0] s Known issues ------------ Here are the changes found in Patchwork_18861_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-hsw: [PASS][1] -> [FAIL][2] ([i915#2389]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-hsw1/igt@gem_exec_reloc@basic-many-active@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-hsw2/igt@gem_exec_reloc@basic-many-active@rcs0.html * igt@gem_exec_reloc@basic-wc-cpu-active: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([i915#1635] / [i915#1982]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-apl3/igt@gem_exec_reloc@basic-wc-cpu-active.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-apl3/igt@gem_exec_reloc@basic-wc-cpu-active.html * igt@kms_cursor_crc@pipe-a-cursor-64x21-random: - shard-skl: [PASS][5] -> [FAIL][6] ([i915#54]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl10/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-skl: [PASS][7] -> [INCOMPLETE][8] ([i915#300]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy: - shard-hsw: [PASS][9] -> [FAIL][10] ([i915#96]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html * igt@kms_cursor_legacy@short-flip-before-cursor-toggle: - shard-glk: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-glk4/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-glk8/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html * igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled: - shard-hsw: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-hsw1/igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-hsw6/igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled.html * igt@kms_flip@basic-plain-flip@a-dp1: - shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-kbl7/igt@kms_flip@basic-plain-flip@a-dp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-kbl4/igt@kms_flip@basic-plain-flip@a-dp1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#2122]) +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: - shard-glk: [PASS][21] -> [FAIL][22] ([i915#49]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-glk8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-glk4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear: - shard-tglb: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render: - shard-skl: [PASS][25] -> [DMESG-WARN][26] ([i915#1982]) +9 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][27] -> [FAIL][28] ([i915#1188]) +1 similar issue [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_psr@psr2_cursor_blt: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-iclb5/igt@kms_psr@psr2_cursor_blt.html #### Possible fixes #### * igt@gem_exec_create@madvise: - shard-hsw: [FAIL][31] ([i915#1888]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-hsw2/igt@gem_exec_create@madvise.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-hsw6/igt@gem_exec_create@madvise.html * igt@gem_exec_fence@syncobj-unused-fence: - shard-skl: [WARN][33] -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl9/igt@gem_exec_fence@syncobj-unused-fence.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl8/igt@gem_exec_fence@syncobj-unused-fence.html * igt@gem_userptr_blits@sync-unmap-cycles: - shard-snb: [INCOMPLETE][35] ([i915#82]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-snb5/igt@gem_userptr_blits@sync-unmap-cycles.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-snb2/igt@gem_userptr_blits@sync-unmap-cycles.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [DMESG-WARN][37] ([i915#1436] / [i915#716]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl9/igt@gen9_exec_parse@allowed-single.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl8/igt@gen9_exec_parse@allowed-single.html * {igt@kms_async_flips@async-flip-with-page-flip-events}: - shard-kbl: [FAIL][39] ([i915#2521]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-kbl2/igt@kms_async_flips@async-flip-with-page-flip-events.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-kbl3/igt@kms_async_flips@async-flip-with-page-flip-events.html - shard-apl: [FAIL][41] ([i915#1635] / [i915#2521]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-apl3/igt@kms_async_flips@async-flip-with-page-flip-events.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-apl4/igt@kms_async_flips@async-flip-with-page-flip-events.html * igt@kms_cursor_crc@pipe-b-cursor-64x64-sliding: - shard-skl: [FAIL][43] ([i915#54]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-64x64-sliding.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-64x64-sliding.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-skl: [DMESG-WARN][45] ([i915#1982]) -> [PASS][46] +7 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-apl: [DMESG-WARN][47] ([i915#1635] / [i915#1982]) -> [PASS][48] +2 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-apl7/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-apl3/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions.html * igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-hdmi-a1-hdmi-a2: - shard-glk: [DMESG-WARN][49] ([i915#1982]) -> [PASS][50] +3 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-glk7/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-hdmi-a1-hdmi-a2.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-glk2/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2: - shard-glk: [FAIL][51] ([i915#79]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-tglb: [DMESG-WARN][53] ([i915#1982]) -> [PASS][54] +2 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-stridechange.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-stridechange.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [FAIL][55] ([fdo#108145] / [i915#265]) -> [PASS][56] +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: [SKIP][57] ([fdo#109441]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-iclb6/igt@kms_psr@psr2_cursor_plane_onoff.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html * igt@kms_setmode@basic: - shard-hsw: [FAIL][59] ([i915#31]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-hsw7/igt@kms_setmode@basic.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-hsw8/igt@kms_setmode@basic.html * igt@kms_universal_plane@disable-primary-vs-flip-pipe-a: - shard-hsw: [DMESG-WARN][61] ([i915#1982]) -> [PASS][62] +2 similar issues [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-hsw1/igt@kms_universal_plane@disable-primary-vs-flip-pipe-a.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-hsw6/igt@kms_universal_plane@disable-primary-vs-flip-pipe-a.html * igt@kms_universal_plane@universal-plane-gen9-features-pipe-a: - shard-kbl: [DMESG-WARN][63] ([i915#1982]) -> [PASS][64] +3 similar issues [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-kbl2/igt@kms_universal_plane@universal-plane-gen9-features-pipe-a.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-kbl3/igt@kms_universal_plane@universal-plane-gen9-features-pipe-a.html * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend: - shard-skl: [INCOMPLETE][65] ([i915#198]) -> [PASS][66] +1 similar issue [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl10/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl1/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html * igt@kms_vblank@pipe-c-query-idle-hang: - shard-hsw: [INCOMPLETE][67] ([i915#2055]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-hsw1/igt@kms_vblank@pipe-c-query-idle-hang.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-hsw2/igt@kms_vblank@pipe-c-query-idle-hang.html * igt@kms_vblank@pipe-c-wait-busy: - shard-iclb: [DMESG-WARN][69] ([i915#1982]) -> [PASS][70] +1 similar issue [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-iclb5/igt@kms_vblank@pipe-c-wait-busy.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-iclb8/igt@kms_vblank@pipe-c-wait-busy.html * igt@perf@short-reads: - shard-skl: [FAIL][71] ([i915#51]) -> [PASS][72] [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-skl10/igt@perf@short-reads.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-skl9/igt@perf@short-reads.html * igt@perf_pmu@module-unload: - shard-tglb: [DMESG-WARN][73] ([i915#1982] / [k.org#205379]) -> [PASS][74] [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9271/shard-tglb2/igt@perf_pmu@module-unload.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/shard-tglb1/igt@perf_pmu@module-unload.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2055]: https://gitlab.freedesktop.org/drm/intel/issues/2055 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389 [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#51]: https://gitlab.freedesktop.org/drm/intel/issues/51 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82 [i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96 [k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379 Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_9271 -> Patchwork_18861 CI-20190529: 20190529 CI_DRM_9271: 3e0f3e5a1c3f6fe6e03c1fa210ef262ce03c8148 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5836: 4c2ec0ad123b82f42f9fe2297e1a41fec73c9229 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18861: 5499c92b4eeeca8dbed5eb84ba33e78bb269dca0 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18861/index.html [-- Attachment #1.2: Type: text/html, Size: 20011 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-11-10 7:02 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-11-05 15:49 [Intel-gfx] [CI 1/2] drm/i915/gem: Allow backends to override pread implementation Chris Wilson 2020-11-05 15:49 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend Chris Wilson 2020-11-05 18:41 ` Chris Wilson 2020-11-10 7:03 ` Rodrigo Vivi 2020-11-09 13:41 ` Ruhl, Michael J 2020-11-05 17:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915/gem: Allow backends to override pread implementation Patchwork 2020-11-05 17:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-11-05 21:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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