public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, seanpaul@chromium.org
Subject: [Intel-gfx] [PATCH v5 12/17] drm/hdcp: Max MST content streams
Date: Wed, 11 Nov 2020 11:50:46 +0530	[thread overview]
Message-ID: <20201111062051.11529-13-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201111062051.11529-1-anshuman.gupta@intel.com>

Let's define Maximum MST content streams up to four
generically which can be supported by modern display
controllers.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 include/drm/drm_hdcp.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index fe58dbb46962..ac22c246542a 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -101,11 +101,11 @@
 
 /* Following Macros take a byte at a time for bit(s) masking */
 /*
- * TODO: This has to be changed for DP MST, as multiple stream on
- * same port is possible.
- * For HDCP2.2 on HDMI and DP SST this value is always 1.
+ * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
+ * H/W MST streams capacity.
+ * This required to be moved out to platform specific header.
  */
-#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	1
+#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	4
 #define HDCP_2_2_TXCAP_MASK_LEN			2
 #define HDCP_2_2_RXCAPS_LEN			3
 #define HDCP_2_2_RX_REPEATER(x)			((x) & BIT(0))
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-11-11  6:35 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-11  6:20 [Intel-gfx] [PATCH v5 00/17] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 01/17] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 02/17] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 03/17] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 04/17] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 05/17] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 06/17] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 07/17] drm/i915/hdcp: Enable HDCP 1.4 stream encryption Anshuman Gupta
2020-11-24 14:14   ` Ramalingam C
2020-11-24 15:05     ` Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 08/17] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-11-24 14:20   ` Ramalingam C
2020-11-24 15:02     ` Anshuman Gupta
2020-11-24 16:17       ` Ramalingam C
2020-11-24 16:05         ` Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 09/17] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 10/17] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 11/17] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-11-11  6:20 ` Anshuman Gupta [this message]
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 13/17] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-11-24 16:49   ` Ramalingam C
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 14/17] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-11-24 17:03   ` Ramalingam C
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 15/17] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 16/17] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-11-11  6:20 ` [Intel-gfx] [PATCH v5 17/17] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-11-11 15:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev4) Patchwork
2020-11-11 16:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-11 18:16 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-24 10:57 ` [Intel-gfx] [PATCH v5 00/17] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Karthik B S

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201111062051.11529-13-anshuman.gupta@intel.com \
    --to=anshuman.gupta@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=seanpaul@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox