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From: Sean Z Huang <sean.z.huang@intel.com>
To: sean.z.huang@intel.com, Intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PXP CLEAN PATCH v06 09/27] drm/i915/pxp: Implement funcs to get/set PXP tag
Date: Fri, 13 Nov 2020 16:36:58 -0800	[thread overview]
Message-ID: <20201114003716.4875-9-sean.z.huang@intel.com> (raw)
In-Reply-To: <20201114003716.4875-1-sean.z.huang@intel.com>

From: "Huang, Sean Z" <sean.z.huang@intel.com>

Implement the functions to get/set the PXP tag, which is 32-bit
bitwise value containing the hardware session info, such as its
session id, protection mode or whether it's enabled.

Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 105 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/pxp/intel_pxp_sm.h |  18 ++++
 2 files changed, 123 insertions(+)

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 3dd5a9e3926b..fd5d10e71a27 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -49,6 +49,16 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
 	return err;
 }
 
+static u8 pxp_get_session_id(int session_index, int session_type)
+{
+	u8 session_id = session_index & SESSION_ID_MASK;
+
+	if (session_type == SESSION_TYPE_TYPE1)
+		session_id |= SESSION_TYPE_MASK;
+
+	return session_id;
+}
+
 /**
  * is_sw_session_active - Check if the given sw session id is active.
  * @i915: i915 device handle.
@@ -86,6 +96,101 @@ static bool is_sw_session_active(struct drm_i915_private *i915, int session_type
 	return false;
 }
 
+static int pxp_set_pxp_tag(struct drm_i915_private *i915, int session_type,
+			   int session_idx, int protection_mode)
+{
+	struct pxp_tag *pxp_tag;
+	int ret;
+
+	if (!i915 || session_type >= SESSION_TYPE_MAX) {
+		ret = -EINVAL;
+		drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+		goto end;
+	}
+
+	if (session_type == SESSION_TYPE_TYPE0 && session_idx < MAX_TYPE0_SESSIONS) {
+		pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type0_session_pxp_tag[session_idx];
+	} else if (session_type == SESSION_TYPE_TYPE1 && session_idx < MAX_TYPE1_SESSIONS) {
+		pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type1_session_pxp_tag[session_idx];
+	} else {
+		ret = -EINVAL;
+		drm_dbg(&i915->drm, "Failed to %s, bad params session_type=[%d], session_idx=[%d]\n",
+			__func__, session_type, session_idx);
+		goto end;
+	}
+
+	switch (protection_mode) {
+	case PROTECTION_MODE_NONE:
+	{
+		pxp_tag->enable = false;
+		pxp_tag->hm = false;
+		pxp_tag->sm = false;
+		break;
+	}
+	case PROTECTION_MODE_LM:
+	{
+		pxp_tag->enable = true;
+		pxp_tag->hm = false;
+		pxp_tag->sm = false;
+		pxp_tag->instance_id++;
+		break;
+	}
+	case PROTECTION_MODE_HM:
+	{
+		pxp_tag->enable = true;
+		pxp_tag->hm = true;
+		pxp_tag->sm = false;
+		pxp_tag->instance_id++;
+		break;
+	}
+	case PROTECTION_MODE_SM:
+	{
+		pxp_tag->enable = true;
+		pxp_tag->hm = true;
+		pxp_tag->sm = true;
+		pxp_tag->instance_id++;
+		break;
+	}
+	default:
+		ret = -EINVAL;
+		drm_dbg(&i915->drm, "Failed to %s, bad params protection_mode=[%d]\n",
+			__func__, protection_mode);
+		goto end;
+	}
+
+	pxp_tag->session_id = pxp_get_session_id(session_idx, session_type);
+
+	ret = 0;
+end:
+	return ret;
+}
+
+u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx,
+			  int session_type, u32 *session_is_alive)
+{
+	struct pxp_tag *pxp_tag;
+
+	if (!i915 || session_type >= SESSION_TYPE_MAX) {
+		drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+		return -EINVAL;
+	}
+
+	if (session_type == SESSION_TYPE_TYPE0 && session_idx < MAX_TYPE0_SESSIONS) {
+		pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type0_session_pxp_tag[session_idx];
+	} else if (session_type == SESSION_TYPE_TYPE1 && session_idx < MAX_TYPE1_SESSIONS) {
+		pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type1_session_pxp_tag[session_idx];
+	} else {
+		drm_dbg(&i915->drm, "Failed to %s, bad params session_type=[%d], session_idx=[%d]\n",
+			__func__, session_type, session_idx);
+		return -EINVAL;
+	}
+
+	if (session_is_alive)
+		*session_is_alive = pxp_tag->enable;
+
+	return pxp_tag->value;
+}
+
 static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index)
 {
 	u32 regval_sip = 0;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index a3149c18c831..c1f6b1be3fd1 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -19,6 +19,9 @@
 #define GEN12_KCR_TSIP_LOW  _MMIO(0x32264)   /* KCR type1 session in play 0-31 */
 #define GEN12_KCR_TSIP_HIGH _MMIO(0x32268)   /* KCR type1 session in play 32-63 */
 
+#define SESSION_TYPE_MASK BIT(7)
+#define SESSION_ID_MASK (BIT(7) - 1)
+
 enum pxp_session_types {
 	SESSION_TYPE_TYPE0 = 0,
 	SESSION_TYPE_TYPE1 = 1,
@@ -35,6 +38,21 @@ enum pxp_protection_modes {
 	PROTECTION_MODE_ALL
 };
 
+struct pxp_tag {
+	union {
+		u32 value;
+		struct {
+			u32 session_id  : 8;
+			u32 instance_id : 8;
+			u32 enable      : 1;
+			u32 hm          : 1;
+			u32 reserved_1  : 1;
+			u32 sm          : 1;
+			u32 reserved_2  : 12;
+		};
+	};
+};
+
 /**
  * struct pxp_protected_session - linked list to track all active sessions.
  */
-- 
2.17.1

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  parent reply	other threads:[~2020-11-14  0:37 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-14  0:36 [Intel-gfx] [PXP CLEAN PATCH v06 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 02/27] drm/i915/pxp: Enable PXP irq worker and callback stub Sean Z Huang
2020-11-16 14:27   ` Souza, Jose
2020-11-23 15:01     ` Jani Nikula
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 03/27] drm/i915/pxp: Add PXP context for logical hardware states Sean Z Huang
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 04/27] drm/i915/pxp: set KCR reg init during the boot time Sean Z Huang
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context Sean Z Huang
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 06/27] drm/i915: Rename the whitelist to allowlist Sean Z Huang
2020-11-23 15:04   ` Jani Nikula
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 07/27] drm/i915/pxp: Add PXP-related registers into allowlist Sean Z Huang
2020-11-23 15:05   ` Jani Nikula
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
2020-11-14  2:42   ` kernel test robot
2020-11-14  0:36 ` Sean Z Huang [this message]
2020-11-14  0:36 ` [Intel-gfx] [PXP CLEAN PATCH v06 10/27] drm/i915/pxp: Enable ioctl action to reserve session slot Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 11/27] drm/i915/pxp: Enable ioctl action to set session in play Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 12/27] drm/i915/pxp: Func to send hardware session termination Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 13/27] drm/i915/pxp: Enable ioctl action to terminate the session Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 14/27] drm/i915/pxp: Enable ioctl action to query PXP tag Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 16/27] drm/i915/pxp: Termiante the session upon app crash Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 17/27] drm/i915/pxp: Enable PXP power management Sean Z Huang
2020-11-23 15:09   ` Jani Nikula
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 18/27] drm/i915/pxp: Implement funcs to create the TEE channel Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 19/27] drm/i915/pxp: Enable ioctl action to send TEE commands Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 20/27] drm/i915/pxp: Create the arbitrary session after boot Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 21/27] drm/i915/pxp: Add i915 trace logs for PXP operations Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 22/27] drm/i915/pxp: Expose session state for display protection flip Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 23/27] mei: bus: enable pavp device Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 24/27] mei: pxp: export pavp client to me client bus Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 25/27] drm/i915/uapi: introduce drm_i915_gem_create_ext for TGL Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 26/27] drm/i915/pavp: User interface for Protected buffer Sean Z Huang
2020-11-14  0:37 ` [Intel-gfx] [PXP CLEAN PATCH v06 27/27] drm/i915/pxp: Add plane decryption support Sean Z Huang
2020-11-14  0:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [PXP,CLEAN,v06,01/27] drm/i915/pxp: Introduce Intel PXP component Patchwork
2020-11-23 15:13   ` Jani Nikula
2020-11-16 14:24 ` [Intel-gfx] [PXP CLEAN PATCH v06 01/27] " Souza, Jose

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