Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Matthew Brost <matthew.brost@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 07/20] drm/i915/gt: Shrink the critical section for irq signaling
Date: Thu, 10 Dec 2020 09:37:13 -0800	[thread overview]
Message-ID: <20201210173713.GA25527@sdutt-i7> (raw)
In-Reply-To: <20201207193824.18114-7-chris@chris-wilson.co.uk>

On Mon, Dec 07, 2020 at 07:38:11PM +0000, Chris Wilson wrote:
> Let's only wait for the list iterator when decoupling the virtual
> breadcrumb, as the signaling of all the requests may take a long time,
> during which we do not want to keep the tasklet spinning.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/gt/intel_breadcrumbs.c       | 2 ++
>  drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h | 1 +
>  drivers/gpu/drm/i915/gt/intel_lrc.c               | 3 ++-
>  3 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> index 63900edbde88..ac1e5f6c3c2c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> @@ -239,6 +239,7 @@ static void signal_irq_work(struct irq_work *work)
>  		intel_breadcrumbs_disarm_irq(b);
>  
>  	rcu_read_lock();
> +	atomic_inc(&b->signaler_active);
>  	list_for_each_entry_rcu(ce, &b->signalers, signal_link) {
>  		struct i915_request *rq;
>  
> @@ -274,6 +275,7 @@ static void signal_irq_work(struct irq_work *work)
>  			}
>  		}
>  	}
> +	atomic_dec(&b->signaler_active);
>  	rcu_read_unlock();
>  
>  	llist_for_each_safe(signal, sn, signal) {
> diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h b/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
> index a74bb3062bd8..f672053d694d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
> @@ -35,6 +35,7 @@ struct intel_breadcrumbs {
>  	spinlock_t signalers_lock; /* protects the list of signalers */
>  	struct list_head signalers;
>  	struct llist_head signaled_requests;
> +	atomic_t signaler_active;
>  
>  	spinlock_t irq_lock; /* protects the interrupt from hardirq context */
>  	struct irq_work irq_work; /* for use from inside irq_lock */
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index b3db16b2a5a4..35cded25c6c1 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1401,7 +1401,8 @@ static void kick_siblings(struct i915_request *rq, struct intel_context *ce)
>  		 * ce->signal_link.
>  		 */
>  		i915_request_cancel_breadcrumb(rq);
> -		irq_work_sync(&engine->breadcrumbs->irq_work);
> +		while (atomic_read(&engine->breadcrumbs->signaler_active))
> +			cpu_relax();

Would a 'cond_resched' be better here? I trust your opinion on which to
use but thought I'd mention it.

With that:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>

>  	}
>  
>  	if (READ_ONCE(ve->request))
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-12-10 17:43 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-07 19:38 [Intel-gfx] [PATCH 01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 02/20] drm/i915/gt: Replace direct submit with direct call to tasklet Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 03/20] drm/i915/gt: Use virtual_engine during execlists_dequeue Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 04/20] drm/i915/gt: Decouple inflight virtual engines Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 05/20] drm/i915/gt: Defer schedule_out until after the next dequeue Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 06/20] drm/i915/gt: Remove virtual breadcrumb before transfer Chris Wilson
2020-12-10 17:28   ` Matthew Brost
2020-12-07 19:38 ` [Intel-gfx] [PATCH 07/20] drm/i915/gt: Shrink the critical section for irq signaling Chris Wilson
2020-12-10 17:37   ` Matthew Brost [this message]
2020-12-11 11:21     ` Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 08/20] drm/i915/gt: Resubmit the virtual engine on schedule-out Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 09/20] drm/i915/gt: Simplify virtual engine handling for execlists_hold() Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 10/20] drm/i915/gt: ce->inflight updates are now serialised Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 11/20] drm/i915/gem: Drop free_work for GEM contexts Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 12/20] drm/i915/gt: Track the overall awake/busy time Chris Wilson
2020-12-10 17:51   ` Matthew Brost
2020-12-13 19:51     ` Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 13/20] drm/i915: Encode fence specific waitqueue behaviour into the wait.flags Chris Wilson
2020-12-10 18:03   ` Matthew Brost
2020-12-07 19:38 ` [Intel-gfx] [PATCH 14/20] drm/i915/gt: Track all timelines created using the HWSP Chris Wilson
2020-12-08 11:45   ` [Intel-gfx] [PATCH] " Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 15/20] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 16/20] drm/i915/gt: Track timeline GGTT offset separately from subpage offset Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 17/20] drm/i915/gt: Add timeline "mode" Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 18/20] drm/i915/gt: Use indices for writing into relative timelines Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 19/20] drm/i915/selftests: Exercise relative timeline modes Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 20/20] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines Chris Wilson
2020-12-07 19:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion Patchwork
2020-12-07 20:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-07 21:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-12-08 13:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion (rev2) Patchwork
2020-12-08 13:49 ` [Intel-gfx] [PATCH 01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion Tvrtko Ursulin
2020-12-08 14:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion (rev2) Patchwork
2020-12-08 16:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201210173713.GA25527@sdutt-i7 \
    --to=matthew.brost@intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox