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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Huang@freedesktop.org, intel-gfx@lists.freedesktop.org,
	Sean Z <sean.z.huang@intel.com>
Subject: Re: [Intel-gfx] [RFC 05/14] drm/i915/pxp: set KCR reg init during the boot time
Date: Mon, 8 Feb 2021 12:35:36 -0500	[thread overview]
Message-ID: <20210208173536.GG4798@intel.com> (raw)
In-Reply-To: <20210206020925.36729-6-daniele.ceraolospurio@intel.com>

On Fri, Feb 05, 2021 at 06:09:16PM -0800, Daniele Ceraolo Spurio wrote:
> Set the KCR init during the boot time, which is required by hardware,
> to allow us doing further protection operation such as sending commands
> to GPU or TEE.
> 
> Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>  drivers/gpu/drm/i915/pxp/intel_pxp.c | 29 +++++++++++++++++++++++++++-
>  1 file changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 4ddc8a71a3e7..950daee5b907 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -6,6 +6,24 @@
>  #include "gt/intel_context.h"
>  #include "i915_drv.h"
>  
> +/* KCR register definitions */
> +#define KCR_INIT _MMIO(0x320f0)
> +
> +/* Setting KCR Init bit is required after system boot */
> +#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES REG_BIT(14)

I still don't like the spread register defines... we will soon have some weird duplications...

but seems a new trend...

rant aside:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> +
> +static void kcr_pxp_enable(struct intel_gt *gt)
> +{
> +	intel_uncore_write(gt->uncore, KCR_INIT,
> +			   _MASKED_BIT_ENABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES));
> +}
> +
> +static void kcr_pxp_disable(struct intel_gt *gt)
> +{
> +	intel_uncore_write(gt->uncore, KCR_INIT,
> +			   _MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES));
> +}
> +
>  static int create_vcs_context(struct intel_pxp *pxp)
>  {
>  	struct intel_gt *gt = pxp_to_gt(pxp);
> @@ -43,19 +61,28 @@ void intel_pxp_init(struct intel_pxp *pxp)
>  	if (!HAS_PXP(gt->i915))
>  		return;
>  
> +	kcr_pxp_enable(gt);
> +
>  	ret = create_vcs_context(pxp);
>  	if (ret)
> -		return;
> +		goto out_kcr;
>  
>  	drm_info(&gt->i915->drm, "Protected Xe Path (PXP) protected content support initialized\n");
>  
>  	return;
> +
> +out_kcr:
> +	kcr_pxp_disable(gt);
>  }
>  
>  void intel_pxp_fini(struct intel_pxp *pxp)
>  {
> +	struct intel_gt *gt = pxp_to_gt(pxp);
> +
>  	if (!intel_pxp_is_enabled(pxp))
>  		return;
>  
>  	destroy_vcs_context(pxp);
> +
> +	kcr_pxp_disable(gt);
>  }
> -- 
> 2.29.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  reply	other threads:[~2021-02-08 17:35 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-06  2:09 [Intel-gfx] [RFC 00/14] Introduce Intel PXP Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 01/14] drm/i915/pxp: Define PXP component interface Daniele Ceraolo Spurio
2021-02-08 11:29   ` Rodrigo Vivi
2021-02-06  2:09 ` [Intel-gfx] [RFC 02/14] mei: pxp: export pavp client to me client bus Daniele Ceraolo Spurio
2021-02-08 13:13   ` Rodrigo Vivi
2021-02-06  2:09 ` [Intel-gfx] [RFC 03/14] drm/i915/pxp: define PXP device flag and kconfig Daniele Ceraolo Spurio
2021-02-08 13:14   ` Rodrigo Vivi
2021-02-06  2:09 ` [Intel-gfx] [RFC 04/14] drm/i915/pxp: allocate a vcs context for pxp usage Daniele Ceraolo Spurio
2021-02-06 12:49   ` Chris Wilson
2021-02-08 18:27     ` Daniele Ceraolo Spurio
2021-02-06 13:01   ` Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 05/14] drm/i915/pxp: set KCR reg init during the boot time Daniele Ceraolo Spurio
2021-02-08 17:35   ` Rodrigo Vivi [this message]
2021-02-06  2:09 ` [Intel-gfx] [RFC 06/14] drm/i915/pxp: Implement funcs to create the TEE channel Daniele Ceraolo Spurio
2021-02-06 12:52   ` Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 07/14] drm/i915/pxp: Create the arbitrary session after boot Daniele Ceraolo Spurio
2021-02-06 12:55   ` Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 08/14] drm/i915/pxp: Implement arb session teardown Daniele Ceraolo Spurio
2021-02-06 12:59   ` Chris Wilson
2021-02-08 19:43     ` Daniele Ceraolo Spurio
2021-02-08 20:41       ` Chris Wilson
2021-02-06  2:09 ` [Intel-gfx] [RFC 09/14] drm/i915/pxp: Implement PXP irq handler Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 10/14] drm/i915/pxp: Enable PXP power management Daniele Ceraolo Spurio
2021-02-06 13:06   ` Chris Wilson
2021-02-06 13:08     ` Chris Wilson
2021-02-08 18:33       ` Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 11/14] drm/i915/uapi: introduce drm_i915_gem_create_ext Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 12/14] drm/i915/pxp: User interface for Protected buffer Daniele Ceraolo Spurio
2021-02-06 12:25   ` Chris Wilson
2021-02-08 18:10     ` Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 13/14] drm/i915/pxp: Add plane decryption support Daniele Ceraolo Spurio
2021-02-06  2:09 ` [Intel-gfx] [RFC 14/14] drm/i915/pxp: enable PXP for integrated Gen12 Daniele Ceraolo Spurio
2021-02-06  2:15 ` [Intel-gfx] [RFC 00/14] Introduce Intel PXP Daniele Ceraolo Spurio
2021-02-06  3:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-02-06  3:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-06  3:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-06 16:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-02-12 13:23 ` [Intel-gfx] [RFC 00/14] " Lionel Landwerlin
2021-02-12 15:10   ` Daniele Ceraolo Spurio
2021-02-12 15:13     ` Lionel Landwerlin

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