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From: Sean Paul <sean@poorly.run>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Sean Paul <seanpaul@chromium.org>
Subject: [Intel-gfx] [PATCH 2/2] drm/i915/dp_link_training: Convert DRM_DEBUG_KMS to drm_dbg_kms
Date: Wed, 10 Mar 2021 16:47:57 -0500	[thread overview]
Message-ID: <20210310214845.29021-2-sean@poorly.run> (raw)
In-Reply-To: <20210310214845.29021-1-sean@poorly.run>

From: Sean Paul <seanpaul@chromium.org>

One instance of DRM_DEBUG_KMS was leftover in dp_link_training, convert
it to the new shiny.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 .../gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index ad02d493ec16..19ba7c7cbaab 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -26,12 +26,13 @@
 #include "intel_dp_link_training.h"
 
 static void
-intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
+intel_dp_dump_link_status(struct drm_device *drm,
+			  const u8 link_status[DP_LINK_STATUS_SIZE])
 {
-
-	DRM_DEBUG_KMS("ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",
-		      link_status[0], link_status[1], link_status[2],
-		      link_status[3], link_status[4], link_status[5]);
+	drm_dbg_kms(drm,
+		    "ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",
+		    link_status[0], link_status[1], link_status[2],
+		    link_status[3], link_status[4], link_status[5]);
 }
 
 static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
@@ -642,7 +643,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
 		/* Make sure clock is still ok */
 		if (!drm_dp_clock_recovery_ok(link_status,
 					      crtc_state->lane_count)) {
-			intel_dp_dump_link_status(link_status);
+			intel_dp_dump_link_status(&i915->drm, link_status);
 			drm_dbg_kms(&i915->drm,
 				    "Clock recovery check failed, cannot "
 				    "continue channel equalization\n");
@@ -669,7 +670,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
 
 	/* Try 5 times, else fail and try at lower BW */
 	if (tries == 5) {
-		intel_dp_dump_link_status(link_status);
+		intel_dp_dump_link_status(&i915->drm, link_status);
 		drm_dbg_kms(&i915->drm,
 			    "Channel equalization failed 5 times\n");
 	}
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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  reply	other threads:[~2021-03-10 21:49 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-10 21:47 [Intel-gfx] [PATCH 1/2] drm/i915/dp_link_training: Add newlines to debug messages Sean Paul
2021-03-10 21:47 ` Sean Paul [this message]
2021-03-11 15:09   ` [Intel-gfx] [PATCH 2/2] drm/i915/dp_link_training: Convert DRM_DEBUG_KMS to drm_dbg_kms Ville Syrjälä
2021-03-10 22:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/dp_link_training: Add newlines to debug messages Patchwork
2021-03-11  0:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-03-11 15:09 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
2021-03-15 14:10   ` Jani Nikula

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