Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [RFC 17/28] drm/i915: Favour IS_GENx
Date: Wed, 14 Apr 2021 12:50:17 +0100	[thread overview]
Message-ID: <20210414115028.168504-18-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20210414115028.168504-1-tvrtko.ursulin@linux.intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Replace INTEL_GEN (not-)equals with IS_GENx for more optimisation
opportunities.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
 drivers/gpu/drm/i915/intel_fbc.c         | 2 +-
 drivers/gpu/drm/i915/intel_pm.c          | 6 +++---
 drivers/gpu/drm/i915/intel_ringbuffer.h  | 4 ++--
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 298f8996cc54..3983d6a44f78 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -483,7 +483,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
 	if (INTEL_GEN(dev_priv) >= 10) {
 		for_each_pipe(dev_priv, pipe)
 			info->num_scalers[pipe] = 2;
-	} else if (INTEL_GEN(dev_priv) == 9) {
+	} else if (IS_GEN9(dev_priv)) {
 		info->num_scalers[PIPE_A] = 2;
 		info->num_scalers[PIPE_B] = 2;
 		info->num_scalers[PIPE_C] = 1;
@@ -578,7 +578,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
 		cherryview_sseu_info_init(dev_priv);
 	else if (IS_BROADWELL(dev_priv))
 		broadwell_sseu_info_init(dev_priv);
-	else if (INTEL_GEN(dev_priv) == 9)
+	else if (IS_GEN9(dev_priv))
 		gen9_sseu_info_init(dev_priv);
 	else if (INTEL_GEN(dev_priv) >= 10)
 		gen10_sseu_info_init(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index d7d1ac79c38a..0ad854095c38 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -94,7 +94,7 @@ static int intel_fbc_calculate_cfb_size(struct drm_i915_private *dev_priv,
 	int lines;
 
 	intel_fbc_get_plane_source_size(cache, NULL, &lines);
-	if (INTEL_GEN(dev_priv) == 7)
+	if (IS_GEN7(dev_priv))
 		lines = min(lines, 2048);
 	else if (INTEL_GEN(dev_priv) >= 8)
 		lines = min(lines, 2560);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6f98d144924e..b026b020d8b8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7554,7 +7554,7 @@ unsigned long i915_chipset_val(struct drm_i915_private *dev_priv)
 {
 	unsigned long val;
 
-	if (INTEL_GEN(dev_priv) != 5)
+	if (!IS_GEN5(dev_priv))
 		return 0;
 
 	spin_lock_irq(&mchdev_lock);
@@ -7638,7 +7638,7 @@ static void __i915_update_gfx_val(struct drm_i915_private *dev_priv)
 
 void i915_update_gfx_val(struct drm_i915_private *dev_priv)
 {
-	if (INTEL_GEN(dev_priv) != 5)
+	if (!IS_GEN5(dev_priv))
 		return;
 
 	spin_lock_irq(&mchdev_lock);
@@ -7689,7 +7689,7 @@ unsigned long i915_gfx_val(struct drm_i915_private *dev_priv)
 {
 	unsigned long val;
 
-	if (INTEL_GEN(dev_priv) != 5)
+	if (!IS_GEN5(dev_priv))
 		return 0;
 
 	spin_lock_irq(&mchdev_lock);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 8f1a4badf812..6b9a0c7f0af4 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -85,11 +85,11 @@ hangcheck_action_to_str(const enum intel_engine_hangcheck_action a)
 #define I915_MAX_SUBSLICES 3
 
 #define instdone_slice_mask(dev_priv__) \
-	(INTEL_GEN(dev_priv__) == 7 ? \
+	(IS_GEN7(dev_priv__) ? \
 	 1 : INTEL_INFO(dev_priv__)->sseu.slice_mask)
 
 #define instdone_subslice_mask(dev_priv__) \
-	(INTEL_GEN(dev_priv__) == 7 ? \
+	(IS_GEN7(dev_priv__) ? \
 	 1 : INTEL_INFO(dev_priv__)->sseu.subslice_mask)
 
 #define for_each_instdone_slice_subslice(dev_priv__, slice__, subslice__) \
-- 
2.27.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2021-04-14 11:51 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-14 11:50 [Intel-gfx] [RFC 00/28] Old platform/gen kconfig options series Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 01/28] drm/i915: Make I830 platform support optional Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 02/28] drm/i915: Make I845G " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 03/28] drm/i915: Make I85X " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 04/28] drm/i915: Make I865G " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 05/28] drm/i915: Make GEN2 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 06/28] drm/i915: Make Gen3 platforms " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 07/28] drm/i915: Make Gen4 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 08/28] drm/i915: Make Ironlake/Gen5 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 09/28] drm/i915: Make Sandybridge/Gen6 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 10/28] drm/i915: Make Gen7/7.5 platform " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 11/28] drm/i915: Make Gen8 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 12/28] drm/i915: Make Gen9 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 13/28] drm/i915: Make Gen10 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 14/28] drm/i915: Make Gen11 " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 15/28] drm/i915: Simplify IS_GEN macros Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 16/28] drm/i915: Use INTEL_GEN everywhere Tvrtko Ursulin
2021-04-14 11:50 ` Tvrtko Ursulin [this message]
2021-04-14 11:50 ` [Intel-gfx] [RFC 18/28] drm/i915: Use Gen Kconfig items in IS_GEN macro Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 19/28] drm/i915: Replace arithmetic INTEL_GEN checks with the " Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 20/28] drm/i915: Use IS_GEN in execbuffer Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 21/28] drm/i915: Allow render state to be compiled out Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 22/28] drm/i915: Use IS_GEN in stolen Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 23/28] drm/i915: Use IS_GEN in intel_bios.c Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 24/28] drm/i915: Use IS_GEN in intel_fb_pitch_limit Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 25/28] drm/i915: Use IS_GEN in intel_engine_cs.c Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 26/28] drm/i915: Use IS_GEN in intel_guc.c Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 27/28] drm/i915: Use IS_GEN in intel_lrc.c Tvrtko Ursulin
2021-04-14 11:50 ` [Intel-gfx] [RFC 28/28] drm/i915: Enable dropping small cores when not enabled Tvrtko Ursulin
2021-04-14 12:25 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Old platform/gen kconfig options series Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210414115028.168504-18-tvrtko.ursulin@linux.intel.com \
    --to=tvrtko.ursulin@linux.intel.com \
    --cc=Intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox