From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 5/5] drm/i915/display/xelpd: Implement Wa_14013475917
Date: Sat, 17 Apr 2021 17:21:26 -0700 [thread overview]
Message-ID: <20210418002126.87882-5-jose.souza@intel.com> (raw)
In-Reply-To: <20210418002126.87882-1-jose.souza@intel.com>
This workaround requires that VIDEO_DIP_ENABLE_VSC_HSW is never set
with PSR.
BSpec: 54369
BSpec: 54077
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index de7328685d40..3876a52642a4 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -531,6 +531,11 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
hsw_dip_data_reg(dev_priv, cpu_transcoder, type, i >> 2),
0);
+ /* Wa_14013475917 */
+ if (DISPLAY_VER(dev_priv) == 13 && crtc_state->has_psr &&
+ type == DP_SDP_VSC)
+ return;
+
val |= hsw_infoframe_enable(type);
intel_de_write(dev_priv, ctl_reg, val);
intel_de_posting_read(dev_priv, ctl_reg);
--
2.31.1
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next prev parent reply other threads:[~2021-04-18 0:19 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-18 0:21 [Intel-gfx] [PATCH 1/5] drm/i915/display: Fill PSR state during hardware configuration read out José Roberto de Souza
2021-04-18 0:21 ` [Intel-gfx] [PATCH 2/5] drm/i915/display: Replace intel_psr_enabled() calls by intel_crtc_state check José Roberto de Souza
2021-05-10 23:47 ` Sripada, Radhakrishna
2021-04-18 0:21 ` [Intel-gfx] [PATCH 3/5] drm/i915/display: Drop duplicated code in intel_dp_set_infoframes() José Roberto de Souza
2021-05-10 23:49 ` Sripada, Radhakrishna
2021-04-18 0:21 ` [Intel-gfx] [PATCH 4/5] drm/i915/display: Drop dead code from hsw_read_infoframe() José Roberto de Souza
2021-05-10 23:50 ` Sripada, Radhakrishna
2021-04-18 0:21 ` José Roberto de Souza [this message]
2021-05-11 0:05 ` [Intel-gfx] [PATCH 5/5] drm/i915/display/xelpd: Implement Wa_14013475917 Sripada, Radhakrishna
2021-04-18 0:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/5] drm/i915/display: Fill PSR state during hardware configuration read out Patchwork
2021-04-18 1:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-04-18 3:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-05-11 19:32 ` Souza, Jose
2021-05-10 23:45 ` [Intel-gfx] [PATCH 1/5] " Sripada, Radhakrishna
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