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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 01/10] drm/i915/xelpd: add XE_LPD display characteristics
Date: Thu,  6 May 2021 19:19:21 +0300	[thread overview]
Message-ID: <20210506161930.309688-2-imre.deak@intel.com> (raw)
In-Reply-To: <20210506161930.309688-1-imre.deak@intel.com>

From: Matt Roper <matthew.d.roper@intel.com>

Let's start preparing for upcoming platforms that will use an XE_LPD
design.

v2:
 - Use the now-preferred "XE_LPD" term to refer to this design
 - Utilize DISPLAY_VER() rather than a feature flag
 - Drop unused mbus_size field (Lucas)
v3:
 - Adjust for dbuf.{size,slice_mask} (Ville)

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.h |  2 ++
 drivers/gpu/drm/i915/i915_pci.c                    | 10 ++++++++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index f3ca5d5c97781..acf47252d9e75 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -380,6 +380,8 @@ intel_display_power_put_all_in_set(struct drm_i915_private *i915,
 enum dbuf_slice {
 	DBUF_S1,
 	DBUF_S2,
+	DBUF_S3,
+	DBUF_S4,
 	I915_MAX_DBUF_SLICES
 };
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c678e0663d808..00e15fe00f4f0 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -939,6 +939,16 @@ static const struct intel_device_info adl_s_info = {
 	.dma_mask_size = 46,
 };
 
+#define XE_LPD_FEATURES \
+	.display.ver = 13,						\
+	.display.has_psr_hw_tracking = 0,				\
+	.abox_mask = GENMASK(1, 0),					\
+	.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \
+	.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |	\
+		BIT(TRANSCODER_C) | BIT(TRANSCODER_D),			\
+	.dbuf.size = 4096,						\
+	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4)
+
 #undef GEN
 #undef PLATFORM
 
-- 
2.27.0

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  reply	other threads:[~2021-05-06 16:19 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-06 16:19 [Intel-gfx] [PATCH v2 00/10] drm/i915/adl_p: Add support for Display Page Tables Imre Deak
2021-05-06 16:19 ` Imre Deak [this message]
2021-05-06 19:09   ` [Intel-gfx] [PATCH v2 01/10] drm/i915/xelpd: add XE_LPD display characteristics Souza, Jose
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 02/10] drm/i915/adl_p: Add PCI Devices IDs Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 03/10] drm/i915/adl_p: ADL_P device info enabling Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 04/10] drm/i915/xelpd: First stab at DPT support Imre Deak
2021-07-28  6:50   ` Daniel Vetter
2021-07-28 16:41     ` Rodrigo Vivi
2021-07-28 19:06       ` Daniel Vetter
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 05/10] drm/i915/xelpd: Fallback to plane stride limitations when using DPT Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 06/10] drm/i915/xelpd: Support 128k plane stride Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 07/10] drm/i915/adl_p: Add stride restriction when using DPT Imre Deak
2021-05-06 21:03   ` Clint Taylor
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 08/10] drm/i915/adl_p: Disable support for 90/270 FB rotation Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 09/10] drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 10/10] drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT Imre Deak
2021-05-06 16:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/adl_p: Add support for Display Page Tables (rev2) Patchwork
2021-05-06 16:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-06 17:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-06 17:58   ` Imre Deak
2021-05-06 19:12     ` Vudum, Lakshminarayana
2021-05-06 18:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-06 20:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-05-07  9:36   ` Imre Deak
2021-05-07 14:56     ` Vudum, Lakshminarayana

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