From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 07/10] drm/i915/adl_p: Add stride restriction when using DPT
Date: Thu, 6 May 2021 19:19:27 +0300 [thread overview]
Message-ID: <20210506161930.309688-8-imre.deak@intel.com> (raw)
In-Reply-To: <20210506161930.309688-1-imre.deak@intel.com>
From: José Roberto de Souza <jose.souza@intel.com>
Alderlake-P have a new stride restriction when using DPT and it is used
by non linear framebuffers. Stride needs to be a power of two to take
full DPT rows, but stride is a parameter set by userspace.
What we could do is use a fake stride when doing DPT allocation so
HW requirements are met and userspace don't need to be changed to
met this power of two restrictions but this change will take a while
to be implemented so for now adding this restriction in driver to
reject atomic commits that would cause visual corruptions.
BSpec: 53393
Acked-by: Matt Roper <matthew.d.roper@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 292396058e75d..70ac197746b1f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11566,6 +11566,15 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
}
}
+ if (IS_ALDERLAKE_P(dev_priv) &&
+ mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
+ !is_power_of_2(mode_cmd->pitches[i])) {
+ drm_dbg_kms(&dev_priv->drm,
+ "plane %d pitch (%d) must be power of two for tiled buffers\n",
+ i, mode_cmd->pitches[i]);
+ goto err;
+ }
+
fb->obj[i] = &obj->base;
}
--
2.27.0
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next prev parent reply other threads:[~2021-05-06 16:19 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-06 16:19 [Intel-gfx] [PATCH v2 00/10] drm/i915/adl_p: Add support for Display Page Tables Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 01/10] drm/i915/xelpd: add XE_LPD display characteristics Imre Deak
2021-05-06 19:09 ` Souza, Jose
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 02/10] drm/i915/adl_p: Add PCI Devices IDs Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 03/10] drm/i915/adl_p: ADL_P device info enabling Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 04/10] drm/i915/xelpd: First stab at DPT support Imre Deak
2021-07-28 6:50 ` Daniel Vetter
2021-07-28 16:41 ` Rodrigo Vivi
2021-07-28 19:06 ` Daniel Vetter
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 05/10] drm/i915/xelpd: Fallback to plane stride limitations when using DPT Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 06/10] drm/i915/xelpd: Support 128k plane stride Imre Deak
2021-05-06 16:19 ` Imre Deak [this message]
2021-05-06 21:03 ` [Intel-gfx] [PATCH v2 07/10] drm/i915/adl_p: Add stride restriction when using DPT Clint Taylor
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 08/10] drm/i915/adl_p: Disable support for 90/270 FB rotation Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 09/10] drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 10/10] drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT Imre Deak
2021-05-06 16:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/adl_p: Add support for Display Page Tables (rev2) Patchwork
2021-05-06 16:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-06 17:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-06 17:58 ` Imre Deak
2021-05-06 19:12 ` Vudum, Lakshminarayana
2021-05-06 18:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-06 20:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-05-07 9:36 ` Imre Deak
2021-05-07 14:56 ` Vudum, Lakshminarayana
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