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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 4/7] drm/i915/xelpd: Required bandwidth increases when VT-d is active
Date: Tue, 11 May 2021 21:21:41 -0700	[thread overview]
Message-ID: <20210512042144.2089071-5-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20210512042144.2089071-1-matthew.d.roper@intel.com>

If VT-d is active, the memory bandwidth usage of the display is 5%
higher.  Take this into account when determining whether we can support
a display configuration.

Bspec: 64631
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 969169743630..a35435083b60 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -344,6 +344,9 @@ static unsigned int intel_bw_data_rate(struct drm_i915_private *dev_priv,
 	for_each_pipe(dev_priv, pipe)
 		data_rate += bw_state->data_rate[pipe];
 
+	if (DISPLAY_VER(dev_priv) >= 13 && intel_vtd_active())
+		data_rate = data_rate * 105 / 100;
+
 	return data_rate;
 }
 
-- 
2.25.4

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  parent reply	other threads:[~2021-05-12  4:21 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-12  4:21 [Intel-gfx] [CI 0/7] CI pass for reviewed XeLPD / ADL-P patches Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 1/7] drm/i915/xelpd: Handle proper AUX interrupt bits Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 2/7] drm/i915/xelpd: Define plane capabilities Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 3/7] drm/i915/xelpd: Add XE_LPD power wells Matt Roper
2021-05-12  4:21 ` Matt Roper [this message]
2021-05-12  4:21 ` [Intel-gfx] [CI 5/7] drm/i915/xelpd: Add Wa_14011503030 Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 6/7] drm/i915/adl_p: Add PCH support Matt Roper
2021-05-12  4:21 ` [Intel-gfx] [CI 7/7] drm/i915/perf: Enable OA formats for ADL_P Matt Roper
2021-05-12  4:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for CI pass for reviewed XeLPD / ADL-P patches Patchwork
2021-05-12  5:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-12  5:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for CI pass for reviewed XeLPD / ADL-P patches (rev2) Patchwork
2021-05-12  6:13 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-12 16:18   ` Matt Roper
2021-05-12 16:43     ` Vudum, Lakshminarayana
2021-05-12 17:45     ` Vudum, Lakshminarayana
2021-05-12 17:23 ` Patchwork
2021-05-12 17:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-12 19:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for CI pass for reviewed XeLPD / ADL-P patches (rev3) Patchwork
2021-05-12 20:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-12 21:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for CI pass for reviewed XeLPD / ADL-P patches (rev2) Patchwork
2021-05-13  0:02   ` Matt Roper
2021-05-13  1:21 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for CI pass for reviewed XeLPD / ADL-P patches (rev3) Patchwork

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