* [Intel-gfx] [PATCH 0/3] More DMC cleanup
@ 2021-05-20 23:53 Anusha Srivatsa
2021-05-20 23:53 ` [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa
` (5 more replies)
0 siblings, 6 replies; 12+ messages in thread
From: Anusha Srivatsa @ 2021-05-20 23:53 UTC (permalink / raw)
To: intel-gfx
Last of prep patches before Pipe DMC patches
can land.
v2: Add struct intel_dmc to intel_dmc.h in a separate
patch
Anusha Srivatsa (3):
drm/i915/dmc: s/DRM_ERROR/drm_err
drm/i915/dmc: Add intel_dmc_has_payload() helper
drm/i915/dmc: Move struct intel_dmc to intel_dmc.h
.../drm/i915/display/intel_display_debugfs.c | 4 +-
.../drm/i915/display/intel_display_power.c | 16 +++---
drivers/gpu/drm/i915/display/intel_dmc.c | 55 +++++++++++--------
drivers/gpu/drm/i915/display/intel_dmc.h | 22 ++++++++
drivers/gpu/drm/i915/i915_drv.h | 18 +-----
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
6 files changed, 67 insertions(+), 50 deletions(-)
--
2.25.0
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^ permalink raw reply [flat|nested] 12+ messages in thread* [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err 2021-05-20 23:53 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa @ 2021-05-20 23:53 ` Anusha Srivatsa 2021-05-21 10:00 ` Jani Nikula 2021-05-20 23:53 ` [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa ` (4 subsequent siblings) 5 siblings, 1 reply; 12+ messages in thread From: Anusha Srivatsa @ 2021-05-20 23:53 UTC (permalink / raw) To: intel-gfx; +Cc: Lucas De Marchi Use new format of debug messages across intel_csr. While at it, change some function definitions which now need dev_priv for drm_err and drm_info etc. v2: use container_of() (Jani) Cc: Jani Nikula <jani.nikula@linux.intel.com> Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> --- drivers/gpu/drm/i915/display/intel_dmc.c | 42 ++++++++++++++---------- 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 560574dd929a..71ef6022d4af 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -400,6 +400,8 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, u32 mmio_count, mmio_count_max; u8 *payload; + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); + BUILD_BUG_ON(ARRAY_SIZE(dmc->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || ARRAY_SIZE(dmc->mmioaddr) < DMC_V1_MAX_MMIO_COUNT); @@ -439,28 +441,28 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, header_len_bytes = dmc_header->header_len; dmc_header_size = sizeof(*v1); } else { - DRM_ERROR("Unknown DMC fw header version: %u\n", - dmc_header->header_ver); + drm_err(&i915->drm, "Unknown DMC fw header version: %u\n", + dmc_header->header_ver); return 0; } if (header_len_bytes != dmc_header_size) { - DRM_ERROR("DMC firmware has wrong dmc header length " + drm_err(&i915->drm, "DMC firmware has wrong dmc header length " "(%u bytes)\n", header_len_bytes); return 0; } /* Cache the dmc header info. */ if (mmio_count > mmio_count_max) { - DRM_ERROR("DMC firmware has wrong mmio count %u\n", mmio_count); + drm_err(&i915->drm, "DMC firmware has wrong mmio count %u\n", mmio_count); return 0; } for (i = 0; i < mmio_count; i++) { if (mmioaddr[i] < DMC_MMIO_START_RANGE || mmioaddr[i] > DMC_MMIO_END_RANGE) { - DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n", - mmioaddr[i]); + drm_err(&i915->drm, "DMC firmware has wrong mmio address 0x%x\n", + mmioaddr[i]); return 0; } dmc->mmioaddr[i] = _MMIO(mmioaddr[i]); @@ -476,14 +478,14 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, goto error_truncated; if (payload_size > dmc->max_fw_size) { - DRM_ERROR("DMC FW too big (%u bytes)\n", payload_size); + drm_err(&i915->drm, "DMC FW too big (%u bytes)\n", payload_size); return 0; } dmc->dmc_fw_size = dmc_header->fw_size; dmc->dmc_payload = kmalloc(payload_size, GFP_KERNEL); if (!dmc->dmc_payload) { - DRM_ERROR("Memory allocation failed for dmc payload\n"); + drm_err(&i915->drm, "Memory allocation failed for dmc payload\n"); return 0; } @@ -493,7 +495,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, return header_len_bytes + payload_size; error_truncated: - DRM_ERROR("Truncated DMC firmware, refusing.\n"); + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); return 0; } @@ -507,6 +509,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, u32 num_entries, max_entries, dmc_offset; const struct intel_fw_info *fw_info; + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); + if (rem_size < package_size) goto error_truncated; @@ -515,8 +519,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, } else if (package_header->header_ver == 2) { max_entries = PACKAGE_V2_MAX_FW_INFO_ENTRIES; } else { - DRM_ERROR("DMC firmware has unknown header version %u\n", - package_header->header_ver); + drm_err(&i915->drm, "DMC firmware has unknown header version %u\n", + package_header->header_ver); return 0; } @@ -529,8 +533,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, goto error_truncated; if (package_header->header_len * 4 != package_size) { - DRM_ERROR("DMC firmware has wrong package header length " - "(%u bytes)\n", package_size); + drm_err(&i915->drm, "DMC firmware has wrong package header length " + "(%u bytes)\n", package_size); return 0; } @@ -543,8 +547,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, dmc_offset = find_dmc_fw_offset(fw_info, num_entries, si, package_header->header_ver); if (dmc_offset == DMC_DEFAULT_FW_OFFSET) { - DRM_ERROR("DMC firmware not supported for %c stepping\n", - si->stepping); + drm_err(&i915->drm, "DMC firmware not supported for %c stepping\n", + si->stepping); return 0; } @@ -552,7 +556,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc, return package_size + dmc_offset * 4; error_truncated: - DRM_ERROR("Truncated DMC firmware, refusing.\n"); + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); return 0; } @@ -561,14 +565,16 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc, struct intel_css_header *css_header, size_t rem_size) { + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); + if (rem_size < sizeof(struct intel_css_header)) { - DRM_ERROR("Truncated DMC firmware, refusing.\n"); + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); return 0; } if (sizeof(struct intel_css_header) != (css_header->header_len * 4)) { - DRM_ERROR("DMC firmware has wrong CSS header length " + drm_err(&i915->drm, "DMC firmware has wrong CSS header length " "(%u bytes)\n", (css_header->header_len * 4)); return 0; -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err 2021-05-20 23:53 ` [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa @ 2021-05-21 10:00 ` Jani Nikula 0 siblings, 0 replies; 12+ messages in thread From: Jani Nikula @ 2021-05-21 10:00 UTC (permalink / raw) To: Anusha Srivatsa, intel-gfx; +Cc: Lucas De Marchi On Thu, 20 May 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote: > Use new format of debug messages across intel_csr. > > While at it, change some function definitions which now > need dev_priv for drm_err and drm_info etc. > > v2: use container_of() (Jani) > > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dmc.c | 42 ++++++++++++++---------- > 1 file changed, 24 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c > index 560574dd929a..71ef6022d4af 100644 > --- a/drivers/gpu/drm/i915/display/intel_dmc.c > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c > @@ -400,6 +400,8 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, > u32 mmio_count, mmio_count_max; > u8 *payload; > > + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); Please keep the variable declarations together; typically you'd have i915 first. Same for all cases below. > + > BUILD_BUG_ON(ARRAY_SIZE(dmc->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || > ARRAY_SIZE(dmc->mmioaddr) < DMC_V1_MAX_MMIO_COUNT); > > @@ -439,28 +441,28 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, > header_len_bytes = dmc_header->header_len; > dmc_header_size = sizeof(*v1); > } else { > - DRM_ERROR("Unknown DMC fw header version: %u\n", > - dmc_header->header_ver); > + drm_err(&i915->drm, "Unknown DMC fw header version: %u\n", > + dmc_header->header_ver); > return 0; > } > > if (header_len_bytes != dmc_header_size) { > - DRM_ERROR("DMC firmware has wrong dmc header length " > + drm_err(&i915->drm, "DMC firmware has wrong dmc header length " > "(%u bytes)\n", header_len_bytes); Please fix indentation on subsequent lines everywhere. Otherwise, LGTM. BR, Jani. > return 0; > } > > /* Cache the dmc header info. */ > if (mmio_count > mmio_count_max) { > - DRM_ERROR("DMC firmware has wrong mmio count %u\n", mmio_count); > + drm_err(&i915->drm, "DMC firmware has wrong mmio count %u\n", mmio_count); > return 0; > } > > for (i = 0; i < mmio_count; i++) { > if (mmioaddr[i] < DMC_MMIO_START_RANGE || > mmioaddr[i] > DMC_MMIO_END_RANGE) { > - DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n", > - mmioaddr[i]); > + drm_err(&i915->drm, "DMC firmware has wrong mmio address 0x%x\n", > + mmioaddr[i]); > return 0; > } > dmc->mmioaddr[i] = _MMIO(mmioaddr[i]); > @@ -476,14 +478,14 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, > goto error_truncated; > > if (payload_size > dmc->max_fw_size) { > - DRM_ERROR("DMC FW too big (%u bytes)\n", payload_size); > + drm_err(&i915->drm, "DMC FW too big (%u bytes)\n", payload_size); > return 0; > } > dmc->dmc_fw_size = dmc_header->fw_size; > > dmc->dmc_payload = kmalloc(payload_size, GFP_KERNEL); > if (!dmc->dmc_payload) { > - DRM_ERROR("Memory allocation failed for dmc payload\n"); > + drm_err(&i915->drm, "Memory allocation failed for dmc payload\n"); > return 0; > } > > @@ -493,7 +495,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, > return header_len_bytes + payload_size; > > error_truncated: > - DRM_ERROR("Truncated DMC firmware, refusing.\n"); > + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); > return 0; > } > > @@ -507,6 +509,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, > u32 num_entries, max_entries, dmc_offset; > const struct intel_fw_info *fw_info; > > + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); > + > if (rem_size < package_size) > goto error_truncated; > > @@ -515,8 +519,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, > } else if (package_header->header_ver == 2) { > max_entries = PACKAGE_V2_MAX_FW_INFO_ENTRIES; > } else { > - DRM_ERROR("DMC firmware has unknown header version %u\n", > - package_header->header_ver); > + drm_err(&i915->drm, "DMC firmware has unknown header version %u\n", > + package_header->header_ver); > return 0; > } > > @@ -529,8 +533,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, > goto error_truncated; > > if (package_header->header_len * 4 != package_size) { > - DRM_ERROR("DMC firmware has wrong package header length " > - "(%u bytes)\n", package_size); > + drm_err(&i915->drm, "DMC firmware has wrong package header length " > + "(%u bytes)\n", package_size); > return 0; > } > > @@ -543,8 +547,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, > dmc_offset = find_dmc_fw_offset(fw_info, num_entries, si, > package_header->header_ver); > if (dmc_offset == DMC_DEFAULT_FW_OFFSET) { > - DRM_ERROR("DMC firmware not supported for %c stepping\n", > - si->stepping); > + drm_err(&i915->drm, "DMC firmware not supported for %c stepping\n", > + si->stepping); > return 0; > } > > @@ -552,7 +556,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc, > return package_size + dmc_offset * 4; > > error_truncated: > - DRM_ERROR("Truncated DMC firmware, refusing.\n"); > + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); > return 0; > } > > @@ -561,14 +565,16 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc, > struct intel_css_header *css_header, > size_t rem_size) > { > + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); > + > if (rem_size < sizeof(struct intel_css_header)) { > - DRM_ERROR("Truncated DMC firmware, refusing.\n"); > + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); > return 0; > } > > if (sizeof(struct intel_css_header) != > (css_header->header_len * 4)) { > - DRM_ERROR("DMC firmware has wrong CSS header length " > + drm_err(&i915->drm, "DMC firmware has wrong CSS header length " > "(%u bytes)\n", > (css_header->header_len * 4)); > return 0; -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper 2021-05-20 23:53 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa 2021-05-20 23:53 ` [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa @ 2021-05-20 23:53 ` Anusha Srivatsa 2021-05-21 10:03 ` Jani Nikula 2021-05-20 23:53 ` [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h Anusha Srivatsa ` (3 subsequent siblings) 5 siblings, 1 reply; 12+ messages in thread From: Anusha Srivatsa @ 2021-05-20 23:53 UTC (permalink / raw) To: intel-gfx; +Cc: Lucas De Marchi We check for dmc_payload being there at various points in the driver. Replace it with the helper. v2: rebased. v3: Move intel_dmc to intel_dmc.h in another patch (Lucas) Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> --- .../gpu/drm/i915/display/intel_display_debugfs.c | 4 ++-- .../gpu/drm/i915/display/intel_display_power.c | 16 ++++++++-------- drivers/gpu/drm/i915/display/intel_dmc.c | 13 +++++++++---- drivers/gpu/drm/i915/display/intel_dmc.h | 5 +++++ drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 5 files changed, 25 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 94e5cbd86e77..88bb05d5c483 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -542,10 +542,10 @@ static int i915_dmc_info(struct seq_file *m, void *unused) wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); - seq_printf(m, "fw loaded: %s\n", yesno(dmc->dmc_payload)); + seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv))); seq_printf(m, "path: %s\n", dmc->fw_path); - if (!dmc->dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) goto out; seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version), diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 991ceea06a07..b546672c9b00 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1220,7 +1220,7 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv, static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv, struct i915_power_well *power_well) { - if (!dev_priv->dmc.dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) return; switch (dev_priv->dmc.target_dc_state) { @@ -5579,7 +5579,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv, gen9_dbuf_enable(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); } @@ -5646,7 +5646,7 @@ static void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume gen9_dbuf_enable(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); } @@ -5712,7 +5712,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume /* 6. Enable DBUF */ gen9_dbuf_enable(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); } @@ -5869,7 +5869,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, if (DISPLAY_VER(dev_priv) >= 12) tgl_bw_buddy_init(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); /* Wa_14011508470 */ @@ -6230,7 +6230,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915, */ if (!(i915->dmc.allowed_dc_mask & DC_STATE_EN_DC9) && suspend_mode == I915_DRM_SUSPEND_IDLE && - i915->dmc.dmc_payload) { + intel_dmc_has_payload(i915)) { intel_display_power_flush_work(i915); intel_power_domains_verify_state(i915); return; @@ -6420,7 +6420,7 @@ void intel_display_power_resume(struct drm_i915_private *i915) if (DISPLAY_VER(i915) >= 11) { bxt_disable_dc9(i915); icl_display_core_init(i915, true); - if (i915->dmc.dmc_payload) { + if (intel_dmc_has_payload(i915)) { if (i915->dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC6) skl_enable_dc6(i915); @@ -6431,7 +6431,7 @@ void intel_display_power_resume(struct drm_i915_private *i915) } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { bxt_disable_dc9(i915); bxt_display_core_init(i915, true); - if (i915->dmc.dmc_payload && + if (intel_dmc_has_payload(i915) && (i915->dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)) gen9_enable_dc5(i915); } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 71ef6022d4af..14282e5fdf8b 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -237,6 +237,11 @@ struct stepping_info { char substepping; }; +bool intel_dmc_has_payload(struct drm_i915_private *dev_priv) +{ + return dev_priv->dmc.dmc_payload; +} + static const struct stepping_info skl_stepping_info[] = { {'A', '0'}, {'B', '0'}, {'C', '0'}, {'D', '0'}, {'E', '0'}, {'F', '0'}, @@ -320,7 +325,7 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv) return; } - if (!dev_priv->dmc.dmc_payload) { + if (!intel_dmc_has_payload(dev_priv)) { drm_err(&dev_priv->drm, "Tried to program CSR with empty payload\n"); return; @@ -658,7 +663,7 @@ static void dmc_load_work_fn(struct work_struct *work) request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv->drm.dev); parse_dmc_fw(dev_priv, fw); - if (dev_priv->dmc.dmc_payload) { + if (intel_dmc_has_payload(dev_priv)) { intel_dmc_load_program(dev_priv); intel_dmc_runtime_pm_put(dev_priv); @@ -787,7 +792,7 @@ void intel_dmc_ucode_suspend(struct drm_i915_private *dev_priv) flush_work(&dev_priv->dmc.work); /* Drop the reference held in case DMC isn't loaded. */ - if (!dev_priv->dmc.dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) intel_dmc_runtime_pm_put(dev_priv); } @@ -807,7 +812,7 @@ void intel_dmc_ucode_resume(struct drm_i915_private *dev_priv) * Reacquire the reference to keep RPM disabled in case DMC isn't * loaded. */ - if (!dev_priv->dmc.dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) intel_dmc_runtime_pm_get(dev_priv); } diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index 57dd99da0ced..a928172459e3 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -6,6 +6,10 @@ #ifndef __INTEL_DMC_H__ #define __INTEL_DMC_H__ +#include <drm/drm_util.h> +#include "intel_wakeref.h" +#include "i915_reg.h" + struct drm_i915_private; #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) @@ -17,5 +21,6 @@ void intel_dmc_load_program(struct drm_i915_private *i915); void intel_dmc_ucode_fini(struct drm_i915_private *i915); void intel_dmc_ucode_suspend(struct drm_i915_private *i915); void intel_dmc_ucode_resume(struct drm_i915_private *i915); +bool intel_dmc_has_payload(struct drm_i915_private *i915); #endif /* __INTEL_DMC_H__ */ diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 8b964e355cb5..833d3e8b7631 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -792,7 +792,7 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m, struct intel_dmc *dmc = &m->i915->dmc; err_printf(m, "DMC loaded: %s\n", - yesno(dmc->dmc_payload)); + yesno(intel_dmc_has_payload(m->i915) != 0)); err_printf(m, "DMC fw version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version), DMC_VERSION_MINOR(dmc->version)); -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper 2021-05-20 23:53 ` [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa @ 2021-05-21 10:03 ` Jani Nikula 2021-05-21 19:28 ` Srivatsa, Anusha 0 siblings, 1 reply; 12+ messages in thread From: Jani Nikula @ 2021-05-21 10:03 UTC (permalink / raw) To: Anusha Srivatsa, intel-gfx; +Cc: Lucas De Marchi On Thu, 20 May 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote: > We check for dmc_payload being there at various points in the driver. > Replace it with the helper. Seems like a good idea. Some comments inline. BR, Jani. > > v2: rebased. > v3: Move intel_dmc to intel_dmc.h in another patch (Lucas) > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > --- > .../gpu/drm/i915/display/intel_display_debugfs.c | 4 ++-- > .../gpu/drm/i915/display/intel_display_power.c | 16 ++++++++-------- > drivers/gpu/drm/i915/display/intel_dmc.c | 13 +++++++++---- > drivers/gpu/drm/i915/display/intel_dmc.h | 5 +++++ > drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- > 5 files changed, 25 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > index 94e5cbd86e77..88bb05d5c483 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > @@ -542,10 +542,10 @@ static int i915_dmc_info(struct seq_file *m, void *unused) > > wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); > > - seq_printf(m, "fw loaded: %s\n", yesno(dmc->dmc_payload)); > + seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv))); > seq_printf(m, "path: %s\n", dmc->fw_path); > > - if (!dmc->dmc_payload) > + if (!intel_dmc_has_payload(dev_priv)) > goto out; > > seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version), > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index 991ceea06a07..b546672c9b00 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -1220,7 +1220,7 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv, > static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv, > struct i915_power_well *power_well) > { > - if (!dev_priv->dmc.dmc_payload) > + if (!intel_dmc_has_payload(dev_priv)) > return; > > switch (dev_priv->dmc.target_dc_state) { > @@ -5579,7 +5579,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv, > > gen9_dbuf_enable(dev_priv); > > - if (resume && dev_priv->dmc.dmc_payload) > + if (resume && intel_dmc_has_payload(dev_priv)) > intel_dmc_load_program(dev_priv); > } > > @@ -5646,7 +5646,7 @@ static void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume > > gen9_dbuf_enable(dev_priv); > > - if (resume && dev_priv->dmc.dmc_payload) > + if (resume && intel_dmc_has_payload(dev_priv)) > intel_dmc_load_program(dev_priv); > } > > @@ -5712,7 +5712,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume > /* 6. Enable DBUF */ > gen9_dbuf_enable(dev_priv); > > - if (resume && dev_priv->dmc.dmc_payload) > + if (resume && intel_dmc_has_payload(dev_priv)) > intel_dmc_load_program(dev_priv); > } > > @@ -5869,7 +5869,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, > if (DISPLAY_VER(dev_priv) >= 12) > tgl_bw_buddy_init(dev_priv); > > - if (resume && dev_priv->dmc.dmc_payload) > + if (resume && intel_dmc_has_payload(dev_priv)) > intel_dmc_load_program(dev_priv); > > /* Wa_14011508470 */ > @@ -6230,7 +6230,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915, > */ > if (!(i915->dmc.allowed_dc_mask & DC_STATE_EN_DC9) && > suspend_mode == I915_DRM_SUSPEND_IDLE && > - i915->dmc.dmc_payload) { > + intel_dmc_has_payload(i915)) { > intel_display_power_flush_work(i915); > intel_power_domains_verify_state(i915); > return; > @@ -6420,7 +6420,7 @@ void intel_display_power_resume(struct drm_i915_private *i915) > if (DISPLAY_VER(i915) >= 11) { > bxt_disable_dc9(i915); > icl_display_core_init(i915, true); > - if (i915->dmc.dmc_payload) { > + if (intel_dmc_has_payload(i915)) { > if (i915->dmc.allowed_dc_mask & > DC_STATE_EN_UPTO_DC6) > skl_enable_dc6(i915); > @@ -6431,7 +6431,7 @@ void intel_display_power_resume(struct drm_i915_private *i915) > } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { > bxt_disable_dc9(i915); > bxt_display_core_init(i915, true); > - if (i915->dmc.dmc_payload && > + if (intel_dmc_has_payload(i915) && > (i915->dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)) > gen9_enable_dc5(i915); > } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c > index 71ef6022d4af..14282e5fdf8b 100644 > --- a/drivers/gpu/drm/i915/display/intel_dmc.c > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c > @@ -237,6 +237,11 @@ struct stepping_info { > char substepping; > }; > > +bool intel_dmc_has_payload(struct drm_i915_private *dev_priv) > +{ > + return dev_priv->dmc.dmc_payload; Please use i915 name for struct drm_i915_private when adding new code. > +} > + > static const struct stepping_info skl_stepping_info[] = { > {'A', '0'}, {'B', '0'}, {'C', '0'}, > {'D', '0'}, {'E', '0'}, {'F', '0'}, > @@ -320,7 +325,7 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv) > return; > } > > - if (!dev_priv->dmc.dmc_payload) { > + if (!intel_dmc_has_payload(dev_priv)) { > drm_err(&dev_priv->drm, > "Tried to program CSR with empty payload\n"); > return; > @@ -658,7 +663,7 @@ static void dmc_load_work_fn(struct work_struct *work) > request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv->drm.dev); > parse_dmc_fw(dev_priv, fw); > > - if (dev_priv->dmc.dmc_payload) { > + if (intel_dmc_has_payload(dev_priv)) { > intel_dmc_load_program(dev_priv); > intel_dmc_runtime_pm_put(dev_priv); > > @@ -787,7 +792,7 @@ void intel_dmc_ucode_suspend(struct drm_i915_private *dev_priv) > flush_work(&dev_priv->dmc.work); > > /* Drop the reference held in case DMC isn't loaded. */ > - if (!dev_priv->dmc.dmc_payload) > + if (!intel_dmc_has_payload(dev_priv)) > intel_dmc_runtime_pm_put(dev_priv); > } > > @@ -807,7 +812,7 @@ void intel_dmc_ucode_resume(struct drm_i915_private *dev_priv) > * Reacquire the reference to keep RPM disabled in case DMC isn't > * loaded. > */ > - if (!dev_priv->dmc.dmc_payload) > + if (!intel_dmc_has_payload(dev_priv)) > intel_dmc_runtime_pm_get(dev_priv); > } > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h > index 57dd99da0ced..a928172459e3 100644 > --- a/drivers/gpu/drm/i915/display/intel_dmc.h > +++ b/drivers/gpu/drm/i915/display/intel_dmc.h > @@ -6,6 +6,10 @@ > #ifndef __INTEL_DMC_H__ > #define __INTEL_DMC_H__ > > +#include <drm/drm_util.h> > +#include "intel_wakeref.h" > +#include "i915_reg.h" > + You don't need any of these for the patch at hand. Please remove. > struct drm_i915_private; > > #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) > @@ -17,5 +21,6 @@ void intel_dmc_load_program(struct drm_i915_private *i915); > void intel_dmc_ucode_fini(struct drm_i915_private *i915); > void intel_dmc_ucode_suspend(struct drm_i915_private *i915); > void intel_dmc_ucode_resume(struct drm_i915_private *i915); > +bool intel_dmc_has_payload(struct drm_i915_private *i915); > > #endif /* __INTEL_DMC_H__ */ > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c > index 8b964e355cb5..833d3e8b7631 100644 > --- a/drivers/gpu/drm/i915/i915_gpu_error.c > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c > @@ -792,7 +792,7 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m, > struct intel_dmc *dmc = &m->i915->dmc; > > err_printf(m, "DMC loaded: %s\n", > - yesno(dmc->dmc_payload)); > + yesno(intel_dmc_has_payload(m->i915) != 0)); The != 0 part is unnecessary. BR, Jani. > err_printf(m, "DMC fw version: %d.%d\n", > DMC_VERSION_MAJOR(dmc->version), > DMC_VERSION_MINOR(dmc->version)); -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper 2021-05-21 10:03 ` Jani Nikula @ 2021-05-21 19:28 ` Srivatsa, Anusha 2021-05-21 19:42 ` Srivatsa, Anusha 0 siblings, 1 reply; 12+ messages in thread From: Srivatsa, Anusha @ 2021-05-21 19:28 UTC (permalink / raw) To: Jani Nikula, intel-gfx@lists.freedesktop.org; +Cc: De Marchi, Lucas > -----Original Message----- > From: Jani Nikula <jani.nikula@linux.intel.com> > Sent: Friday, May 21, 2021 3:04 AM > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- > gfx@lists.freedesktop.org > Cc: De Marchi, Lucas <lucas.demarchi@intel.com> > Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add > intel_dmc_has_payload() helper > > On Thu, 20 May 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote: > > We check for dmc_payload being there at various points in the driver. > > Replace it with the helper. > > Seems like a good idea. Some comments inline. > > BR, > Jani. > > > > > v2: rebased. > > v3: Move intel_dmc to intel_dmc.h in another patch (Lucas) > > > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > > --- > > .../gpu/drm/i915/display/intel_display_debugfs.c | 4 ++-- > > .../gpu/drm/i915/display/intel_display_power.c | 16 ++++++++-------- > > drivers/gpu/drm/i915/display/intel_dmc.c | 13 +++++++++---- > > drivers/gpu/drm/i915/display/intel_dmc.h | 5 +++++ > > drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- > > 5 files changed, 25 insertions(+), 15 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > index 94e5cbd86e77..88bb05d5c483 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > @@ -542,10 +542,10 @@ static int i915_dmc_info(struct seq_file *m, > > void *unused) > > > > wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); > > > > - seq_printf(m, "fw loaded: %s\n", yesno(dmc->dmc_payload)); > > + seq_printf(m, "fw loaded: %s\n", > > +yesno(intel_dmc_has_payload(dev_priv))); > > seq_printf(m, "path: %s\n", dmc->fw_path); > > > > - if (!dmc->dmc_payload) > > + if (!intel_dmc_has_payload(dev_priv)) > > goto out; > > > > seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc- > >version), > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > > b/drivers/gpu/drm/i915/display/intel_display_power.c > > index 991ceea06a07..b546672c9b00 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > > @@ -1220,7 +1220,7 @@ static void > gen9_dc_off_power_well_enable(struct > > drm_i915_private *dev_priv, static void > gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv, > > struct i915_power_well > *power_well) { > > - if (!dev_priv->dmc.dmc_payload) > > + if (!intel_dmc_has_payload(dev_priv)) > > return; > > > > switch (dev_priv->dmc.target_dc_state) { @@ -5579,7 +5579,7 @@ > > static void skl_display_core_init(struct drm_i915_private *dev_priv, > > > > gen9_dbuf_enable(dev_priv); > > > > - if (resume && dev_priv->dmc.dmc_payload) > > + if (resume && intel_dmc_has_payload(dev_priv)) > > intel_dmc_load_program(dev_priv); > > } > > > > @@ -5646,7 +5646,7 @@ static void bxt_display_core_init(struct > > drm_i915_private *dev_priv, bool resume > > > > gen9_dbuf_enable(dev_priv); > > > > - if (resume && dev_priv->dmc.dmc_payload) > > + if (resume && intel_dmc_has_payload(dev_priv)) > > intel_dmc_load_program(dev_priv); > > } > > > > @@ -5712,7 +5712,7 @@ static void cnl_display_core_init(struct > drm_i915_private *dev_priv, bool resume > > /* 6. Enable DBUF */ > > gen9_dbuf_enable(dev_priv); > > > > - if (resume && dev_priv->dmc.dmc_payload) > > + if (resume && intel_dmc_has_payload(dev_priv)) > > intel_dmc_load_program(dev_priv); > > } > > > > @@ -5869,7 +5869,7 @@ static void icl_display_core_init(struct > drm_i915_private *dev_priv, > > if (DISPLAY_VER(dev_priv) >= 12) > > tgl_bw_buddy_init(dev_priv); > > > > - if (resume && dev_priv->dmc.dmc_payload) > > + if (resume && intel_dmc_has_payload(dev_priv)) > > intel_dmc_load_program(dev_priv); > > > > /* Wa_14011508470 */ > > @@ -6230,7 +6230,7 @@ void intel_power_domains_suspend(struct > drm_i915_private *i915, > > */ > > if (!(i915->dmc.allowed_dc_mask & DC_STATE_EN_DC9) && > > suspend_mode == I915_DRM_SUSPEND_IDLE && > > - i915->dmc.dmc_payload) { > > + intel_dmc_has_payload(i915)) { > > intel_display_power_flush_work(i915); > > intel_power_domains_verify_state(i915); > > return; > > @@ -6420,7 +6420,7 @@ void intel_display_power_resume(struct > drm_i915_private *i915) > > if (DISPLAY_VER(i915) >= 11) { > > bxt_disable_dc9(i915); > > icl_display_core_init(i915, true); > > - if (i915->dmc.dmc_payload) { > > + if (intel_dmc_has_payload(i915)) { > > if (i915->dmc.allowed_dc_mask & > > DC_STATE_EN_UPTO_DC6) > > skl_enable_dc6(i915); > > @@ -6431,7 +6431,7 @@ void intel_display_power_resume(struct > drm_i915_private *i915) > > } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { > > bxt_disable_dc9(i915); > > bxt_display_core_init(i915, true); > > - if (i915->dmc.dmc_payload && > > + if (intel_dmc_has_payload(i915) && > > (i915->dmc.allowed_dc_mask & > DC_STATE_EN_UPTO_DC5)) > > gen9_enable_dc5(i915); > > } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { diff --git > > a/drivers/gpu/drm/i915/display/intel_dmc.c > > b/drivers/gpu/drm/i915/display/intel_dmc.c > > index 71ef6022d4af..14282e5fdf8b 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dmc.c > > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c > > @@ -237,6 +237,11 @@ struct stepping_info { > > char substepping; > > }; > > > > +bool intel_dmc_has_payload(struct drm_i915_private *dev_priv) { > > + return dev_priv->dmc.dmc_payload; > > Please use i915 name for struct drm_i915_private when adding new code. > > > +} > > + > > static const struct stepping_info skl_stepping_info[] = { > > {'A', '0'}, {'B', '0'}, {'C', '0'}, > > {'D', '0'}, {'E', '0'}, {'F', '0'}, > > @@ -320,7 +325,7 @@ void intel_dmc_load_program(struct > drm_i915_private *dev_priv) > > return; > > } > > > > - if (!dev_priv->dmc.dmc_payload) { > > + if (!intel_dmc_has_payload(dev_priv)) { > > drm_err(&dev_priv->drm, > > "Tried to program CSR with empty payload\n"); > > return; > > @@ -658,7 +663,7 @@ static void dmc_load_work_fn(struct work_struct > *work) > > request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv- > >drm.dev); > > parse_dmc_fw(dev_priv, fw); > > > > - if (dev_priv->dmc.dmc_payload) { > > + if (intel_dmc_has_payload(dev_priv)) { > > intel_dmc_load_program(dev_priv); > > intel_dmc_runtime_pm_put(dev_priv); > > > > @@ -787,7 +792,7 @@ void intel_dmc_ucode_suspend(struct > drm_i915_private *dev_priv) > > flush_work(&dev_priv->dmc.work); > > > > /* Drop the reference held in case DMC isn't loaded. */ > > - if (!dev_priv->dmc.dmc_payload) > > + if (!intel_dmc_has_payload(dev_priv)) > > intel_dmc_runtime_pm_put(dev_priv); > > } > > > > @@ -807,7 +812,7 @@ void intel_dmc_ucode_resume(struct > drm_i915_private *dev_priv) > > * Reacquire the reference to keep RPM disabled in case DMC isn't > > * loaded. > > */ > > - if (!dev_priv->dmc.dmc_payload) > > + if (!intel_dmc_has_payload(dev_priv)) > > intel_dmc_runtime_pm_get(dev_priv); > > } > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h > > b/drivers/gpu/drm/i915/display/intel_dmc.h > > index 57dd99da0ced..a928172459e3 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dmc.h > > +++ b/drivers/gpu/drm/i915/display/intel_dmc.h > > @@ -6,6 +6,10 @@ > > #ifndef __INTEL_DMC_H__ > > #define __INTEL_DMC_H__ > > > > +#include <drm/drm_util.h> > > +#include "intel_wakeref.h" > > +#include "i915_reg.h" > > + > > You don't need any of these for the patch at hand. Please remove. Actually for i915_reg_t used in the intel_dmc struct, I need to have the header included here. I am making the other changes. Thanks, Anusha > > struct drm_i915_private; > > > > #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) > > @@ -17,5 +21,6 @@ void intel_dmc_load_program(struct > drm_i915_private > > *i915); void intel_dmc_ucode_fini(struct drm_i915_private *i915); > > void intel_dmc_ucode_suspend(struct drm_i915_private *i915); void > > intel_dmc_ucode_resume(struct drm_i915_private *i915); > > +bool intel_dmc_has_payload(struct drm_i915_private *i915); > > > > #endif /* __INTEL_DMC_H__ */ > > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c > > b/drivers/gpu/drm/i915/i915_gpu_error.c > > index 8b964e355cb5..833d3e8b7631 100644 > > --- a/drivers/gpu/drm/i915/i915_gpu_error.c > > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c > > @@ -792,7 +792,7 @@ static void __err_print_to_sgl(struct > drm_i915_error_state_buf *m, > > struct intel_dmc *dmc = &m->i915->dmc; > > > > err_printf(m, "DMC loaded: %s\n", > > - yesno(dmc->dmc_payload)); > > + yesno(intel_dmc_has_payload(m->i915) != 0)); > > The != 0 part is unnecessary. > > BR, > Jani. > > > err_printf(m, "DMC fw version: %d.%d\n", > > DMC_VERSION_MAJOR(dmc->version), > > DMC_VERSION_MINOR(dmc->version)); > > -- > Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper 2021-05-21 19:28 ` Srivatsa, Anusha @ 2021-05-21 19:42 ` Srivatsa, Anusha 0 siblings, 0 replies; 12+ messages in thread From: Srivatsa, Anusha @ 2021-05-21 19:42 UTC (permalink / raw) To: Jani Nikula, intel-gfx@lists.freedesktop.org; +Cc: De Marchi, Lucas > -----Original Message----- > From: Srivatsa, Anusha > Sent: Friday, May 21, 2021 12:28 PM > To: 'Jani Nikula' <jani.nikula@linux.intel.com>; intel- > gfx@lists.freedesktop.org > Cc: De Marchi, Lucas <lucas.demarchi@intel.com> > Subject: RE: [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add > intel_dmc_has_payload() helper > > > > > -----Original Message----- > > From: Jani Nikula <jani.nikula@linux.intel.com> > > Sent: Friday, May 21, 2021 3:04 AM > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- > > gfx@lists.freedesktop.org > > Cc: De Marchi, Lucas <lucas.demarchi@intel.com> > > Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add > > intel_dmc_has_payload() helper > > > > On Thu, 20 May 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> > wrote: > > > We check for dmc_payload being there at various points in the driver. > > > Replace it with the helper. > > > > Seems like a good idea. Some comments inline. > > > > BR, > > Jani. > > > > > > > > v2: rebased. > > > v3: Move intel_dmc to intel_dmc.h in another patch (Lucas) > > > > > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > > > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > > > --- > > > .../gpu/drm/i915/display/intel_display_debugfs.c | 4 ++-- > > > .../gpu/drm/i915/display/intel_display_power.c | 16 ++++++++-------- > > > drivers/gpu/drm/i915/display/intel_dmc.c | 13 +++++++++---- > > > drivers/gpu/drm/i915/display/intel_dmc.h | 5 +++++ > > > drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- > > > 5 files changed, 25 insertions(+), 15 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > > b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > > index 94e5cbd86e77..88bb05d5c483 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > > > @@ -542,10 +542,10 @@ static int i915_dmc_info(struct seq_file *m, > > > void *unused) > > > > > > wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); > > > > > > - seq_printf(m, "fw loaded: %s\n", yesno(dmc->dmc_payload)); > > > + seq_printf(m, "fw loaded: %s\n", > > > +yesno(intel_dmc_has_payload(dev_priv))); > > > seq_printf(m, "path: %s\n", dmc->fw_path); > > > > > > - if (!dmc->dmc_payload) > > > + if (!intel_dmc_has_payload(dev_priv)) > > > goto out; > > > > > > seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc- > version), > > >diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > > > b/drivers/gpu/drm/i915/display/intel_display_power.c > > > index 991ceea06a07..b546672c9b00 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > > > @@ -1220,7 +1220,7 @@ static void > > gen9_dc_off_power_well_enable(struct > > > drm_i915_private *dev_priv, static void > > gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv, > > > struct i915_power_well > > *power_well) { > > > - if (!dev_priv->dmc.dmc_payload) > > > + if (!intel_dmc_has_payload(dev_priv)) > > > return; > > > > > > switch (dev_priv->dmc.target_dc_state) { @@ -5579,7 +5579,7 @@ > > > static void skl_display_core_init(struct drm_i915_private *dev_priv, > > > > > > gen9_dbuf_enable(dev_priv); > > > > > > - if (resume && dev_priv->dmc.dmc_payload) > > > + if (resume && intel_dmc_has_payload(dev_priv)) > > > intel_dmc_load_program(dev_priv); } > > > > > > @@ -5646,7 +5646,7 @@ static void bxt_display_core_init(struct > > > drm_i915_private *dev_priv, bool resume > > > > > > gen9_dbuf_enable(dev_priv); > > > > > > - if (resume && dev_priv->dmc.dmc_payload) > > > + if (resume && intel_dmc_has_payload(dev_priv)) > > > intel_dmc_load_program(dev_priv); } > > > > > > @@ -5712,7 +5712,7 @@ static void cnl_display_core_init(struct > > drm_i915_private *dev_priv, bool resume > > > /* 6. Enable DBUF */ > > > gen9_dbuf_enable(dev_priv); > > > > > > - if (resume && dev_priv->dmc.dmc_payload) > > > + if (resume && intel_dmc_has_payload(dev_priv)) > > > intel_dmc_load_program(dev_priv); } > > > > > > @@ -5869,7 +5869,7 @@ static void icl_display_core_init(struct > > drm_i915_private *dev_priv, > > > if (DISPLAY_VER(dev_priv) >= 12) > > > tgl_bw_buddy_init(dev_priv); > > > > > > - if (resume && dev_priv->dmc.dmc_payload) > > > + if (resume && intel_dmc_has_payload(dev_priv)) > > > intel_dmc_load_program(dev_priv); > > > > > > /* Wa_14011508470 */ > > > @@ -6230,7 +6230,7 @@ void intel_power_domains_suspend(struct > > drm_i915_private *i915, > > > */ > > > if (!(i915->dmc.allowed_dc_mask & DC_STATE_EN_DC9) && > > > suspend_mode == I915_DRM_SUSPEND_IDLE && > > > - i915->dmc.dmc_payload) { > > > + intel_dmc_has_payload(i915)) { > > > intel_display_power_flush_work(i915); > > > intel_power_domains_verify_state(i915); > > > return; > > > @@ -6420,7 +6420,7 @@ void intel_display_power_resume(struct > > drm_i915_private *i915) > > > if (DISPLAY_VER(i915) >= 11) { > > > bxt_disable_dc9(i915); > > > icl_display_core_init(i915, true); > > > - if (i915->dmc.dmc_payload) { > > > + if (intel_dmc_has_payload(i915)) { > > > if (i915->dmc.allowed_dc_mask & > > > DC_STATE_EN_UPTO_DC6) > > > skl_enable_dc6(i915); > > > @@ -6431,7 +6431,7 @@ void intel_display_power_resume(struct > > drm_i915_private *i915) > > > } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { > > > bxt_disable_dc9(i915); > > > bxt_display_core_init(i915, true); > > > - if (i915->dmc.dmc_payload && > > > + if (intel_dmc_has_payload(i915) && > > > (i915->dmc.allowed_dc_mask & > > DC_STATE_EN_UPTO_DC5)) > > > gen9_enable_dc5(i915); > > > } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { diff --git > > > a/drivers/gpu/drm/i915/display/intel_dmc.c > > > b/drivers/gpu/drm/i915/display/intel_dmc.c > > > index 71ef6022d4af..14282e5fdf8b 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_dmc.c > > > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c > > > @@ -237,6 +237,11 @@ struct stepping_info { > > > char substepping; > > > }; > > > > > > +bool intel_dmc_has_payload(struct drm_i915_private *dev_priv) { > > > + return dev_priv->dmc.dmc_payload; > > > > Please use i915 name for struct drm_i915_private when adding new code. > > > > > +} > > > + > > > static const struct stepping_info skl_stepping_info[] = { > > > {'A', '0'}, {'B', '0'}, {'C', '0'}, > > > {'D', '0'}, {'E', '0'}, {'F', '0'}, @@ -320,7 +325,7 @@ void > > > intel_dmc_load_program(struct > > drm_i915_private *dev_priv) > > > return; > > > } > > > > > > - if (!dev_priv->dmc.dmc_payload) { > > > + if (!intel_dmc_has_payload(dev_priv)) { > > > drm_err(&dev_priv->drm, > > > "Tried to program CSR with empty payload\n"); > > > return; > > > @@ -658,7 +663,7 @@ static void dmc_load_work_fn(struct work_struct > > *work) > > > request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv- drm.dev); > > > parse_dmc_fw(dev_priv, fw); > > > > > > - if (dev_priv->dmc.dmc_payload) { > > > + if (intel_dmc_has_payload(dev_priv)) { > > > intel_dmc_load_program(dev_priv); > > > intel_dmc_runtime_pm_put(dev_priv); > > > > > > @@ -787,7 +792,7 @@ void intel_dmc_ucode_suspend(struct > > drm_i915_private *dev_priv) > > > flush_work(&dev_priv->dmc.work); > > > > > > /* Drop the reference held in case DMC isn't loaded. */ > > > - if (!dev_priv->dmc.dmc_payload) > > > + if (!intel_dmc_has_payload(dev_priv)) > > > intel_dmc_runtime_pm_put(dev_priv); > > > } > > > > > > @@ -807,7 +812,7 @@ void intel_dmc_ucode_resume(struct > > drm_i915_private *dev_priv) > > > * Reacquire the reference to keep RPM disabled in case DMC isn't > > > * loaded. > > > */ > > > - if (!dev_priv->dmc.dmc_payload) > > > + if (!intel_dmc_has_payload(dev_priv)) > > > intel_dmc_runtime_pm_get(dev_priv); > > > } > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h > > > b/drivers/gpu/drm/i915/display/intel_dmc.h > > > index 57dd99da0ced..a928172459e3 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_dmc.h > > > +++ b/drivers/gpu/drm/i915/display/intel_dmc.h > > > @@ -6,6 +6,10 @@ > > > #ifndef __INTEL_DMC_H__ > > > #define __INTEL_DMC_H__ > > > > > > +#include <drm/drm_util.h> > > > +#include "intel_wakeref.h" > > > +#include "i915_reg.h" > > > + > > > > You don't need any of these for the patch at hand. Please remove. > > Actually for i915_reg_t used in the intel_dmc struct, I need to have the > header included here. > > I am making the other changes. > Correction, the headers are indeed not needed in this patch. It has to be part of Patch3 of this series. Removing them from this patch. Anusha > Thanks, > Anusha > > > > struct drm_i915_private; > > > > > > #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) > > > @@ -17,5 +21,6 @@ void intel_dmc_load_program(struct > > drm_i915_private > > > *i915); void intel_dmc_ucode_fini(struct drm_i915_private *i915); > > > void intel_dmc_ucode_suspend(struct drm_i915_private *i915); void > > > intel_dmc_ucode_resume(struct drm_i915_private *i915); > > > +bool intel_dmc_has_payload(struct drm_i915_private *i915); > > > > > > #endif /* __INTEL_DMC_H__ */ > > > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c > > > b/drivers/gpu/drm/i915/i915_gpu_error.c > > > index 8b964e355cb5..833d3e8b7631 100644 > > > --- a/drivers/gpu/drm/i915/i915_gpu_error.c > > > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c > > > @@ -792,7 +792,7 @@ static void __err_print_to_sgl(struct > > drm_i915_error_state_buf *m, > > > struct intel_dmc *dmc = &m->i915->dmc; > > > > > > err_printf(m, "DMC loaded: %s\n", > > > - yesno(dmc->dmc_payload)); > > > + yesno(intel_dmc_has_payload(m->i915) != 0)); > > > > The != 0 part is unnecessary. > > > > BR, > > Jani. > > > > > err_printf(m, "DMC fw version: %d.%d\n", > > > DMC_VERSION_MAJOR(dmc->version), > > > DMC_VERSION_MINOR(dmc->version)); > > > > -- > > Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h 2021-05-20 23:53 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa 2021-05-20 23:53 ` [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa 2021-05-20 23:53 ` [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa @ 2021-05-20 23:53 ` Anusha Srivatsa 2021-05-21 0:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup (rev2) Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 12+ messages in thread From: Anusha Srivatsa @ 2021-05-20 23:53 UTC (permalink / raw) To: intel-gfx Move struct intel_dmc from i915_drv.h to intel_dmc.h. Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/display/intel_dmc.h | 17 +++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 18 +----------------- 2 files changed, 18 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index a928172459e3..8baeb85cf8db 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -16,6 +16,23 @@ struct drm_i915_private; #define DMC_VERSION_MAJOR(version) ((version) >> 16) #define DMC_VERSION_MINOR(version) ((version) & 0xffff) +struct intel_dmc { + struct work_struct work; + const char *fw_path; + u32 required_version; + u32 max_fw_size; /* bytes */ + u32 *dmc_payload; + u32 dmc_fw_size; /* dwords */ + u32 version; + u32 mmio_count; + i915_reg_t mmioaddr[20]; + u32 mmiodata[20]; + u32 dc_state; + u32 target_dc_state; + u32 allowed_dc_mask; + intel_wakeref_t wakeref; +}; + void intel_dmc_ucode_init(struct drm_i915_private *i915); void intel_dmc_load_program(struct drm_i915_private *i915); void intel_dmc_ucode_fini(struct drm_i915_private *i915); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9cb02618ba15..b5962768a1f1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -67,6 +67,7 @@ #include "display/intel_bios.h" #include "display/intel_display.h" #include "display/intel_display_power.h" +#include "display/intel_dmc.h" #include "display/intel_dpll_mgr.h" #include "display/intel_dsb.h" #include "display/intel_frontbuffer.h" @@ -328,23 +329,6 @@ struct drm_i915_display_funcs { void (*read_luts)(struct intel_crtc_state *crtc_state); }; -struct intel_dmc { - struct work_struct work; - const char *fw_path; - u32 required_version; - u32 max_fw_size; /* bytes */ - u32 *dmc_payload; - u32 dmc_fw_size; /* dwords */ - u32 version; - u32 mmio_count; - i915_reg_t mmioaddr[20]; - u32 mmiodata[20]; - u32 dc_state; - u32 target_dc_state; - u32 allowed_dc_mask; - intel_wakeref_t wakeref; -}; - enum i915_cache_level { I915_CACHE_NONE = 0, I915_CACHE_LLC, /* also used for snoopable memory on non-LLC */ -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup (rev2) 2021-05-20 23:53 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa ` (2 preceding siblings ...) 2021-05-20 23:53 ` [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h Anusha Srivatsa @ 2021-05-21 0:27 ` Patchwork 2021-05-21 0:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-05-22 11:15 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2021-05-21 0:27 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx == Series Details == Series: More DMC cleanup (rev2) URL : https://patchwork.freedesktop.org/series/90379/ State : warning == Summary == $ dim checkpatch origin/drm-tip 06268e3a934f drm/i915/dmc: s/DRM_ERROR/drm_err -:79: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message #79: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:488: if (!dmc->dmc_payload) { + drm_err(&i915->drm, "Memory allocation failed for dmc payload\n"); total: 0 errors, 1 warnings, 0 checks, 130 lines checked 6da878e7a905 drm/i915/dmc: Add intel_dmc_has_payload() helper 249c6b8f711e drm/i915/dmc: Move struct intel_dmc to intel_dmc.h _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for More DMC cleanup (rev2) 2021-05-20 23:53 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa ` (3 preceding siblings ...) 2021-05-21 0:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup (rev2) Patchwork @ 2021-05-21 0:57 ` Patchwork 2021-05-22 11:15 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2021-05-21 0:57 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 4335 bytes --] == Series Details == Series: More DMC cleanup (rev2) URL : https://patchwork.freedesktop.org/series/90379/ State : success == Summary == CI Bug Log - changes from CI_DRM_10116 -> Patchwork_20165 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/index.html Known issues ------------ Here are the changes found in Patchwork_20165 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#2868]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@kms_frontbuffer_tracking@basic: - fi-icl-u2: [FAIL][3] ([i915#49]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html #### Warnings #### * igt@i915_selftest@live@execlists: - fi-bsw-kefka: [INCOMPLETE][5] ([i915#2782] / [i915#2940] / [i915#3462]) -> [DMESG-FAIL][6] ([i915#3462]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/fi-bsw-kefka/igt@i915_selftest@live@execlists.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/fi-bsw-kefka/igt@i915_selftest@live@execlists.html * igt@runner@aborted: - fi-kbl-r: [FAIL][7] ([i915#1436] / [i915#3363]) -> [FAIL][8] ([i915#1436] / [i915#2426] / [i915#3363]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/fi-kbl-r/igt@runner@aborted.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/fi-kbl-r/igt@runner@aborted.html - fi-cml-u2: [FAIL][9] ([i915#2082] / [i915#2426] / [i915#3363]) -> [FAIL][10] ([i915#3363]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/fi-cml-u2/igt@runner@aborted.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/fi-cml-u2/igt@runner@aborted.html - fi-kbl-7567u: [FAIL][11] ([i915#1436] / [i915#3363]) -> [FAIL][12] ([i915#1436] / [i915#2426] / [i915#3363]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/fi-kbl-7567u/igt@runner@aborted.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/fi-kbl-7567u/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#2082]: https://gitlab.freedesktop.org/drm/intel/issues/2082 [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426 [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782 [i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868 [i915#2932]: https://gitlab.freedesktop.org/drm/intel/issues/2932 [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940 [i915#2966]: https://gitlab.freedesktop.org/drm/intel/issues/2966 [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363 [i915#3462]: https://gitlab.freedesktop.org/drm/intel/issues/3462 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 Participating hosts (41 -> 38) ------------------------------ Missing (3): fi-hsw-4200u fi-bdw-samus fi-snb-2600 Build changes ------------- * Linux: CI_DRM_10116 -> Patchwork_20165 CI-20190529: 20190529 CI_DRM_10116: beca532f1c9f49044e5080e547d72548ff50136d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6090: 8eeb9c130e75d4063d0dc2ed69c8acde66b6b5d0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_20165: 249c6b8f711ed9bad3027c7d0b6ccd8e6815e092 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 249c6b8f711e drm/i915/dmc: Move struct intel_dmc to intel_dmc.h 6da878e7a905 drm/i915/dmc: Add intel_dmc_has_payload() helper 06268e3a934f drm/i915/dmc: s/DRM_ERROR/drm_err == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/index.html [-- Attachment #1.2: Type: text/html, Size: 5642 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for More DMC cleanup (rev2) 2021-05-20 23:53 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa ` (4 preceding siblings ...) 2021-05-21 0:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2021-05-22 11:15 ` Patchwork 5 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2021-05-22 11:15 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 30246 bytes --] == Series Details == Series: More DMC cleanup (rev2) URL : https://patchwork.freedesktop.org/series/90379/ State : success == Summary == CI Bug Log - changes from CI_DRM_10116_full -> Patchwork_20165_full ==================================================== Summary ------- **SUCCESS** No regressions found. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_20165_full: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * {igt@kms_plane@pixel-format@pipe-a-planes}: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-tglb1/igt@kms_plane@pixel-format@pipe-a-planes.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-tglb3/igt@kms_plane@pixel-format@pipe-a-planes.html Known issues ------------ Here are the changes found in Patchwork_20165_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_create@create-massive: - shard-skl: NOTRUN -> [DMESG-WARN][3] ([i915#3002]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl4/igt@gem_create@create-massive.html * igt@gem_ctx_persistence@legacy-engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1099]) +2 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-snb6/igt@gem_ctx_persistence@legacy-engines-mixed-process.html * igt@gem_ctx_ringsize@active@bcs0: - shard-skl: NOTRUN -> [INCOMPLETE][5] ([i915#3316]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@gem_ctx_ringsize@active@bcs0.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][6] ([i915#2846]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl7/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-glk: [PASS][7] -> [FAIL][8] ([i915#2842]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-glk3/igt@gem_exec_fair@basic-none-share@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk4/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][9] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@gem_exec_fair@basic-none-solo@rcs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl4/igt@gem_exec_fair@basic-none@vecs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl3/igt@gem_exec_fair@basic-none@vecs0.html * igt@gem_huc_copy@huc-copy: - shard-kbl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#2190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@gem_huc_copy@huc-copy.html * igt@gem_mmap_gtt@big-copy: - shard-glk: [PASS][13] -> [FAIL][14] ([i915#307]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-glk4/igt@gem_mmap_gtt@big-copy.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk5/igt@gem_mmap_gtt@big-copy.html * igt@gem_mmap_gtt@cpuset-basic-small-copy: - shard-skl: [PASS][15] -> [INCOMPLETE][16] ([i915#198] / [i915#3468]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl6/igt@gem_mmap_gtt@cpuset-basic-small-copy.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl4/igt@gem_mmap_gtt@cpuset-basic-small-copy.html - shard-tglb: [PASS][17] -> [INCOMPLETE][18] ([i915#3468]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-tglb1/igt@gem_mmap_gtt@cpuset-basic-small-copy.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-tglb5/igt@gem_mmap_gtt@cpuset-basic-small-copy.html * igt@gem_mmap_gtt@cpuset-medium-copy-xy: - shard-tglb: [PASS][19] -> [INCOMPLETE][20] ([i915#3468] / [i915#750]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-tglb2/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-tglb7/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html - shard-glk: [PASS][21] -> [INCOMPLETE][22] ([i915#3468]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-glk9/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk1/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html * igt@gem_mmap_gtt@fault-concurrent: - shard-skl: NOTRUN -> [INCOMPLETE][23] ([i915#3468]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@gem_mmap_gtt@fault-concurrent.html * igt@gem_mmap_gtt@fault-concurrent-x: - shard-snb: NOTRUN -> [INCOMPLETE][24] ([i915#3468] / [i915#3485]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-snb5/igt@gem_mmap_gtt@fault-concurrent-x.html * igt@gem_mmap_gtt@fault-concurrent-y: - shard-snb: NOTRUN -> [INCOMPLETE][25] ([i915#3468]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-snb6/igt@gem_mmap_gtt@fault-concurrent-y.html * igt@gem_pwrite@basic-exhaustion: - shard-snb: NOTRUN -> [WARN][26] ([i915#2658]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-snb7/igt@gem_pwrite@basic-exhaustion.html * igt@gem_render_copy@x-tiled-to-vebox-y-tiled: - shard-iclb: NOTRUN -> [SKIP][27] ([i915#768]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@gem_render_copy@x-tiled-to-vebox-y-tiled.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#3323]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl6/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@input-checking: - shard-apl: NOTRUN -> [DMESG-WARN][29] ([i915#3002]) +1 similar issue [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl7/igt@gem_userptr_blits@input-checking.html * igt@gem_userptr_blits@vma-merge: - shard-skl: NOTRUN -> [FAIL][30] ([i915#3318]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@gem_userptr_blits@vma-merge.html * igt@gem_workarounds@suspend-resume-context: - shard-kbl: NOTRUN -> [DMESG-WARN][31] ([i915#180]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl1/igt@gem_workarounds@suspend-resume-context.html * igt@gen7_exec_parse@basic-offset: - shard-skl: NOTRUN -> [SKIP][32] ([fdo#109271]) +96 similar issues [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@gen7_exec_parse@basic-offset.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN -> [FAIL][33] ([i915#3296]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl5/igt@gen9_exec_parse@bb-large.html * igt@i915_selftest@live@execlists: - shard-apl: NOTRUN -> [DMESG-FAIL][34] ([i915#3462]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl3/igt@i915_selftest@live@execlists.html - shard-kbl: NOTRUN -> [INCOMPLETE][35] ([i915#2782] / [i915#3462] / [i915#794]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl2/igt@i915_selftest@live@execlists.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-kbl: [PASS][36] -> [DMESG-WARN][37] ([i915#180]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl4/igt@i915_suspend@fence-restore-tiled2untiled.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-skl: [PASS][38] -> [FAIL][39] ([i915#2521]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_big_fb@y-tiled-64bpp-rotate-270: - shard-iclb: NOTRUN -> [SKIP][40] ([fdo#110725] / [fdo#111614]) +1 similar issue [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html * igt@kms_big_joiner@invalid-modeset: - shard-apl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#2705]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl6/igt@kms_big_joiner@invalid-modeset.html * igt@kms_ccs@pipe-d-crc-primary-basic: - shard-iclb: NOTRUN -> [SKIP][42] ([fdo#109278]) +5 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_ccs@pipe-d-crc-primary-basic.html * igt@kms_chamelium@dp-hpd-fast: - shard-glk: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +1 similar issue [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk3/igt@kms_chamelium@dp-hpd-fast.html * igt@kms_chamelium@dp-mode-timings: - shard-apl: NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +19 similar issues [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl3/igt@kms_chamelium@dp-mode-timings.html * igt@kms_chamelium@hdmi-crc-nonplanar-formats: - shard-iclb: NOTRUN -> [SKIP][45] ([fdo#109284] / [fdo#111827]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_chamelium@hdmi-crc-nonplanar-formats.html * igt@kms_chamelium@vga-hpd-without-ddc: - shard-snb: NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +18 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-snb7/igt@kms_chamelium@vga-hpd-without-ddc.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-skl: NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +5 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl4/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-a-ctm-negative: - shard-kbl: NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +4 similar issues [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@kms_color_chamelium@pipe-a-ctm-negative.html * igt@kms_content_protection@lic: - shard-apl: NOTRUN -> [TIMEOUT][49] ([i915#1319]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl8/igt@kms_content_protection@lic.html * igt@kms_content_protection@uevent: - shard-apl: NOTRUN -> [FAIL][50] ([i915#2105]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl8/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@pipe-c-cursor-512x170-random: - shard-iclb: NOTRUN -> [SKIP][51] ([fdo#109278] / [fdo#109279]) +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_cursor_crc@pipe-c-cursor-512x170-random.html * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: NOTRUN -> [SKIP][52] ([fdo#109349]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_dp_dsc@basic-dsc-enable-edp.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-kbl: [PASS][53] -> [INCOMPLETE][54] ([i915#155] / [i915#180] / [i915#636]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_flip@2x-flip-vs-blocking-wf-vblank: - shard-iclb: NOTRUN -> [SKIP][55] ([fdo#109274]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1: - shard-skl: [PASS][56] -> [FAIL][57] ([i915#79]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1: - shard-skl: [PASS][58] -> [FAIL][59] ([i915#2122]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile: - shard-apl: NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2642]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs: - shard-skl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#2672]) +1 similar issue [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt: - shard-kbl: NOTRUN -> [SKIP][62] ([fdo#109271]) +30 similar issues [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt: - shard-iclb: NOTRUN -> [SKIP][63] ([fdo#109280]) +5 similar issues [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff: - shard-snb: NOTRUN -> [SKIP][64] ([fdo#109271]) +294 similar issues [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-snb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move: - shard-skl: [PASS][65] -> [FAIL][66] ([i915#2546] / [i915#49]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html * igt@kms_invalid_dotclock: - shard-iclb: NOTRUN -> [SKIP][67] ([fdo#109310]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_invalid_dotclock.html * igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c: - shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109289]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c.html * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d: - shard-kbl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#533]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d: - shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#533]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl3/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence: - shard-skl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#533]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl5/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb: - shard-apl: NOTRUN -> [FAIL][72] ([i915#265]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-kbl: NOTRUN -> [FAIL][73] ([fdo#108145] / [i915#265]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html * igt@kms_plane_alpha_blend@pipe-c-alpha-basic: - shard-apl: NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl8/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-d-alpha-opaque-fb: - shard-glk: NOTRUN -> [SKIP][75] ([fdo#109271]) +19 similar issues [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk3/igt@kms_plane_alpha_blend@pipe-d-alpha-opaque-fb.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1: - shard-skl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#658]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3: - shard-apl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658]) +5 similar issues [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1: - shard-glk: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: NOTRUN -> [SKIP][79] ([fdo#109441]) +1 similar issue [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_setmode@invalid-clone-single-crtc-stealing: - shard-skl: NOTRUN -> [WARN][80] ([i915#2100]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl5/igt@kms_setmode@invalid-clone-single-crtc-stealing.html * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> [FAIL][81] ([IGT#2]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@kms_sysfs_edid_timing.html * igt@kms_vblank@pipe-d-wait-idle: - shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#533]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk3/igt@kms_vblank@pipe-d-wait-idle.html * igt@kms_writeback@writeback-pixel-formats: - shard-apl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2437]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl7/igt@kms_writeback@writeback-pixel-formats.html * igt@perf@polling-parameterized: - shard-skl: [PASS][84] -> [FAIL][85] ([i915#1542]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl9/igt@perf@polling-parameterized.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl6/igt@perf@polling-parameterized.html * igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name: - shard-apl: NOTRUN -> [SKIP][86] ([fdo#109271]) +223 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl8/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html * igt@prime_nv_test@nv_write_i915_gtt_mmap_read: - shard-iclb: NOTRUN -> [SKIP][87] ([fdo#109291]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@prime_nv_test@nv_write_i915_gtt_mmap_read.html * igt@sysfs_clients@fair-7: - shard-apl: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#2994]) +4 similar issues [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-apl8/igt@sysfs_clients@fair-7.html * igt@sysfs_clients@recycle-many: - shard-skl: NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#2994]) +1 similar issue [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl5/igt@sysfs_clients@recycle-many.html * igt@sysfs_clients@sema-10: - shard-kbl: NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#2994]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@sysfs_clients@sema-10.html * igt@sysfs_heartbeat_interval@mixed@vcs0: - shard-kbl: [PASS][91] -> [INCOMPLETE][92] ([i915#1731]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl1/igt@sysfs_heartbeat_interval@mixed@vcs0.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl3/igt@sysfs_heartbeat_interval@mixed@vcs0.html #### Possible fixes #### * igt@gem_exec_fair@basic-pace@vcs1: - shard-tglb: [FAIL][93] ([i915#2842]) -> [PASS][94] [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs1.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-tglb2/igt@gem_exec_fair@basic-pace@vcs1.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [FAIL][95] ([i915#2849]) -> [PASS][96] [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_mmap_gtt@big-copy-odd: - shard-glk: [FAIL][97] ([i915#307]) -> [PASS][98] [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-glk7/igt@gem_mmap_gtt@big-copy-odd.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk6/igt@gem_mmap_gtt@big-copy-odd.html * igt@gem_mmap_gtt@cpuset-basic-small-copy: - shard-glk: [INCOMPLETE][99] ([i915#2055] / [i915#3468]) -> [PASS][100] [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-glk4/igt@gem_mmap_gtt@cpuset-basic-small-copy.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-glk3/igt@gem_mmap_gtt@cpuset-basic-small-copy.html * igt@gem_mmap_gtt@cpuset-basic-small-copy-odd: - shard-iclb: [INCOMPLETE][101] ([i915#2910] / [i915#3468]) -> [PASS][102] [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-iclb1/igt@gem_mmap_gtt@cpuset-basic-small-copy-odd.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@gem_mmap_gtt@cpuset-basic-small-copy-odd.html * igt@gem_mmap_gtt@cpuset-big-copy: - shard-iclb: [FAIL][103] ([i915#2428]) -> [PASS][104] [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-iclb5/igt@gem_mmap_gtt@cpuset-big-copy.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy.html * igt@gem_mmap_offset@clear: - shard-skl: [FAIL][105] ([i915#3160]) -> [PASS][106] [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl9/igt@gem_mmap_offset@clear.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@gem_mmap_offset@clear.html * igt@gem_workarounds@suspend-resume: - shard-skl: [INCOMPLETE][107] ([i915#198]) -> [PASS][108] [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl3/igt@gem_workarounds@suspend-resume.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl4/igt@gem_workarounds@suspend-resume.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [DMESG-WARN][109] ([i915#1436] / [i915#716]) -> [PASS][110] [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl5/igt@gen9_exec_parse@allowed-single.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl5/igt@gen9_exec_parse@allowed-single.html * igt@i915_module_load@reload-with-fault-injection: - shard-skl: [DMESG-WARN][111] ([i915#1982]) -> [PASS][112] +1 similar issue [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl6/igt@i915_module_load@reload-with-fault-injection.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl7/igt@i915_module_load@reload-with-fault-injection.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [DMESG-WARN][113] ([i915#180]) -> [PASS][114] +3 similar issues [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][115] ([fdo#108145] / [i915#265]) -> [PASS][116] [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html #### Warnings #### * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy: - shard-skl: [INCOMPLETE][117] ([i915#198]) -> [INCOMPLETE][118] ([i915#198] / [i915#3468]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-skl5/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-skl4/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-iclb: [WARN][119] ([i915#2684]) -> [WARN][120] ([i915#1804] / [i915#2684]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-iclb1/igt@i915_pm_rc6_residency@rc6-fence.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-iclb3/igt@i915_pm_rc6_residency@rc6-fence.html * igt@runner@aborted: - shard-kbl: ([FAIL][121], [FAIL][122], [FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127], [FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134], [FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138]) ([fdo#109271] / [i915#1436] / [i915#180] / [i915#1814] / [i915#2722] / [i915#3002] / [i915#3363] / [i915#602]) -> ([FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152], [FAIL][153], [FAIL][154], [FAIL][155], [FAIL][156]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2722] / [i915#3002] / [i915#3363] / [i915#602] / [i915#92]) [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl2/igt@runner@aborted.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl1/igt@runner@aborted.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl7/igt@runner@aborted.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl7/igt@runner@aborted.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl2/igt@runner@aborted.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl1/igt@runner@aborted.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl4/igt@runner@aborted.html [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl7/igt@runner@aborted.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl4/igt@runner@aborted.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl1/igt@runner@aborted.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl1/igt@runner@aborted.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl2/igt@runner@aborted.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl4/igt@runner@aborted.html [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl7/igt@runner@aborted.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl7/igt@runner@aborted.html [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl3/igt@runner@aborted.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl4/igt@runner@aborted.html [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10116/shard-kbl1/igt@runner@aborted.html [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@runner@aborted.html [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl2/igt@runner@aborted.html [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl3/igt@runner@aborted.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl2/igt@runner@aborted.html [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl1/igt@runner@aborted.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl3/igt@runner@aborted.html [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl1/igt@runner@aborted.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl1/igt@runner@aborted.html [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl3/igt@runner@aborted.html [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl3/igt@runner@aborted.html [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/shard-kbl4/igt@runner@aborted.html [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20165/index.html [-- Attachment #1.2: Type: text/html, Size: 33868 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 0/3] More DMC cleanup @ 2021-05-21 19:51 Anusha Srivatsa 2021-05-21 19:51 ` [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h Anusha Srivatsa 0 siblings, 1 reply; 12+ messages in thread From: Anusha Srivatsa @ 2021-05-21 19:51 UTC (permalink / raw) To: intel-gfx Last of prep patches before Pipe DMC patches can land. v2: Add struct intel_dmc to intel_dmc.h in a separate patch v3: Minor code shuffling and indentation fixes. Anusha Srivatsa (3): drm/i915/dmc: s/DRM_ERROR/drm_err drm/i915/dmc: Add intel_dmc_has_payload() helper drm/i915/dmc: Move struct intel_dmc to intel_dmc.h .../drm/i915/display/intel_display_debugfs.c | 4 +- .../drm/i915/display/intel_display_power.c | 16 ++--- drivers/gpu/drm/i915/display/intel_dmc.c | 61 +++++++++++-------- drivers/gpu/drm/i915/display/intel_dmc.h | 22 +++++++ drivers/gpu/drm/i915/i915_drv.h | 18 +----- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 6 files changed, 69 insertions(+), 54 deletions(-) -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h 2021-05-21 19:51 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa @ 2021-05-21 19:51 ` Anusha Srivatsa 0 siblings, 0 replies; 12+ messages in thread From: Anusha Srivatsa @ 2021-05-21 19:51 UTC (permalink / raw) To: intel-gfx Move struct intel_dmc from i915_drv.h to intel_dmc.h. v2: Add includes along with moving the struct. Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/display/intel_dmc.h | 21 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 18 +----------------- 2 files changed, 22 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index 64816f4a71b6..8baeb85cf8db 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -6,12 +6,33 @@ #ifndef __INTEL_DMC_H__ #define __INTEL_DMC_H__ +#include <drm/drm_util.h> +#include "intel_wakeref.h" +#include "i915_reg.h" + struct drm_i915_private; #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) #define DMC_VERSION_MAJOR(version) ((version) >> 16) #define DMC_VERSION_MINOR(version) ((version) & 0xffff) +struct intel_dmc { + struct work_struct work; + const char *fw_path; + u32 required_version; + u32 max_fw_size; /* bytes */ + u32 *dmc_payload; + u32 dmc_fw_size; /* dwords */ + u32 version; + u32 mmio_count; + i915_reg_t mmioaddr[20]; + u32 mmiodata[20]; + u32 dc_state; + u32 target_dc_state; + u32 allowed_dc_mask; + intel_wakeref_t wakeref; +}; + void intel_dmc_ucode_init(struct drm_i915_private *i915); void intel_dmc_load_program(struct drm_i915_private *i915); void intel_dmc_ucode_fini(struct drm_i915_private *i915); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9cb02618ba15..b5962768a1f1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -67,6 +67,7 @@ #include "display/intel_bios.h" #include "display/intel_display.h" #include "display/intel_display_power.h" +#include "display/intel_dmc.h" #include "display/intel_dpll_mgr.h" #include "display/intel_dsb.h" #include "display/intel_frontbuffer.h" @@ -328,23 +329,6 @@ struct drm_i915_display_funcs { void (*read_luts)(struct intel_crtc_state *crtc_state); }; -struct intel_dmc { - struct work_struct work; - const char *fw_path; - u32 required_version; - u32 max_fw_size; /* bytes */ - u32 *dmc_payload; - u32 dmc_fw_size; /* dwords */ - u32 version; - u32 mmio_count; - i915_reg_t mmioaddr[20]; - u32 mmiodata[20]; - u32 dc_state; - u32 target_dc_state; - u32 allowed_dc_mask; - intel_wakeref_t wakeref; -}; - enum i915_cache_level { I915_CACHE_NONE = 0, I915_CACHE_LLC, /* also used for snoopable memory on non-LLC */ -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-05-22 11:15 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-05-20 23:53 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa 2021-05-20 23:53 ` [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa 2021-05-21 10:00 ` Jani Nikula 2021-05-20 23:53 ` [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa 2021-05-21 10:03 ` Jani Nikula 2021-05-21 19:28 ` Srivatsa, Anusha 2021-05-21 19:42 ` Srivatsa, Anusha 2021-05-20 23:53 ` [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h Anusha Srivatsa 2021-05-21 0:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup (rev2) Patchwork 2021-05-21 0:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-05-22 11:15 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2021-05-21 19:51 [Intel-gfx] [PATCH 0/3] More DMC cleanup Anusha Srivatsa 2021-05-21 19:51 ` [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h Anusha Srivatsa
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