From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH 10/18] drm/i915/guc: Don't repeat CTB layout calculations
Date: Tue, 25 May 2021 23:42:29 -0700 [thread overview]
Message-ID: <20210526064237.77853-11-matthew.brost@intel.com> (raw)
In-Reply-To: <20210526064237.77853-1-matthew.brost@intel.com>
From: Michal Wajdeczko <michal.wajdeczko@intel.com>
We can retrieve offsets to cmds buffers and descriptor from
actual pointers that we already keep locally.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 079e1a160894..34c582105860 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -244,6 +244,7 @@ int intel_guc_ct_enable(struct intel_guc_ct *ct)
{
struct intel_guc *guc = ct_to_guc(ct);
u32 base, cmds;
+ void *blob;
int err;
int i;
@@ -251,15 +252,18 @@ int intel_guc_ct_enable(struct intel_guc_ct *ct)
/* vma should be already allocated and map'ed */
GEM_BUG_ON(!ct->vma);
+ GEM_BUG_ON(!i915_gem_object_has_pinned_pages(ct->vma->obj));
base = intel_guc_ggtt_offset(guc, ct->vma);
- /* (re)initialize descriptors
- * cmds buffers are in the second half of the blob page
- */
+ /* blob should start with send descriptor */
+ blob = __px_vaddr(ct->vma->obj);
+ GEM_BUG_ON(blob != ct->ctbs[CTB_SEND].desc);
+
+ /* (re)initialize descriptors */
for (i = 0; i < ARRAY_SIZE(ct->ctbs); i++) {
GEM_BUG_ON((i != CTB_SEND) && (i != CTB_RECV));
- cmds = base + PAGE_SIZE / 4 * i + PAGE_SIZE / 2;
+ cmds = base + ptrdiff(ct->ctbs[i].cmds, blob);
CT_DEBUG(ct, "%d: cmds addr=%#x\n", i, cmds);
guc_ct_buffer_reset(&ct->ctbs[i], cmds);
@@ -269,12 +273,12 @@ int intel_guc_ct_enable(struct intel_guc_ct *ct)
* Register both CT buffers starting with RECV buffer.
* Descriptors are in first half of the blob.
*/
- err = ct_register_buffer(ct, base + PAGE_SIZE / 4 * CTB_RECV,
+ err = ct_register_buffer(ct, base + ptrdiff(ct->ctbs[CTB_RECV].desc, blob),
INTEL_GUC_CT_BUFFER_TYPE_RECV);
if (unlikely(err))
goto err_out;
- err = ct_register_buffer(ct, base + PAGE_SIZE / 4 * CTB_SEND,
+ err = ct_register_buffer(ct, base + ptrdiff(ct->ctbs[CTB_SEND].desc, blob),
INTEL_GUC_CT_BUFFER_TYPE_SEND);
if (unlikely(err))
goto err_deregister;
--
2.28.0
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next prev parent reply other threads:[~2021-05-26 6:25 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-26 6:42 [Intel-gfx] [PATCH 00/18] Non-interface changing GuC CTBs updates Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Non-interface changing GuC CTBs updates (rev2) Patchwork
2021-05-27 17:13 ` John Harrison
2021-05-27 17:09 ` Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 01/18] drm/i915/guc: skip disabling CTBs before sanitizing the GuC Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 02/18] drm/i915/guc: use probe_error log for CT enablement failure Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 03/18] drm/i915/guc: enable only the user interrupt when using GuC submission Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 04/18] drm/i915/guc: Remove sample_forcewake h2g action Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 05/18] drm/i915/guc: Keep strict GuC ABI definitions Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 06/18] drm/i915/guc: Drop guc->interrupts.enabled Matthew Brost
2021-05-27 17:17 ` John Harrison
2021-05-27 17:13 ` Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 07/18] drm/i915/guc: Stop using fence/status from CTB descriptor Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 08/18] drm/i915: Promote ptrdiff() to i915_utils.h Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 09/18] drm/i915/guc: Only rely on own CTB size Matthew Brost
2021-05-26 6:42 ` Matthew Brost [this message]
2021-05-26 6:42 ` [Intel-gfx] [PATCH 11/18] drm/i915/guc: Replace CTB array with explicit members Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 12/18] drm/i915/guc: Update sizes of CTB buffers Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 13/18] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-05-26 12:25 ` Michal Wajdeczko
2021-05-26 17:38 ` Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 14/18] drm/i915/guc: Start protecting access to CTB descriptors Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 15/18] drm/i915/guc: Ensure H2G buffer updates visible before tail update Matthew Brost
2021-05-26 12:36 ` Michal Wajdeczko
2021-05-26 17:58 ` Matthew Brost
2021-05-28 1:13 ` John Harrison
2021-05-28 6:52 ` Michal Wajdeczko
2021-05-26 6:42 ` [Intel-gfx] [PATCH 16/18] drm/i915/guc: Stop using mutex while sending CTB messages Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 17/18] drm/i915/guc: Don't receive all G2H messages in irq handler Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 18/18] drm/i915/guc: Always copy CT message to new allocation Matthew Brost
2021-05-26 6:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Non-interface changing GuC CTBs updates (rev2) Patchwork
2021-05-27 17:13 ` John Harrison
2021-05-27 17:08 ` Matthew Brost
2021-05-26 7:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-26 9:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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