From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH 14/18] drm/i915/guc: Start protecting access to CTB descriptors
Date: Tue, 25 May 2021 23:42:33 -0700 [thread overview]
Message-ID: <20210526064237.77853-15-matthew.brost@intel.com> (raw)
In-Reply-To: <20210526064237.77853-1-matthew.brost@intel.com>
From: Michal Wajdeczko <michal.wajdeczko@intel.com>
We want to stop using guc.send_mutex while sending CTB messages
so we have to start protecting access to CTB send descriptor.
For completeness protect also CTB receive descriptor.
Add spinlock to struct intel_guc_ct_buffer and start using it.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 14 ++++++++++++--
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 2 ++
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 5b0dece7a7cd..fb875d257536 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -89,6 +89,8 @@ static void ct_incoming_request_worker_func(struct work_struct *w);
*/
void intel_guc_ct_init_early(struct intel_guc_ct *ct)
{
+ spin_lock_init(&ct->ctbs.send.lock);
+ spin_lock_init(&ct->ctbs.recv.lock);
spin_lock_init(&ct->requests.lock);
INIT_LIST_HEAD(&ct->requests.pending);
INIT_LIST_HEAD(&ct->requests.incoming);
@@ -476,17 +478,22 @@ static int ct_send(struct intel_guc_ct *ct,
GEM_BUG_ON(len & ~GUC_CT_MSG_LEN_MASK);
GEM_BUG_ON(!response_buf && response_buf_size);
+ spin_lock_irqsave(&ct->ctbs.send.lock, flags);
+
fence = ct_get_next_fence(ct);
request.fence = fence;
request.status = 0;
request.response_len = response_buf_size;
request.response_buf = response_buf;
- spin_lock_irqsave(&ct->requests.lock, flags);
+ spin_lock(&ct->requests.lock);
list_add_tail(&request.link, &ct->requests.pending);
- spin_unlock_irqrestore(&ct->requests.lock, flags);
+ spin_unlock(&ct->requests.lock);
err = ct_write(ct, action, len, fence);
+
+ spin_unlock_irqrestore(&ct->ctbs.send.lock, flags);
+
if (unlikely(err))
goto unlink;
@@ -822,6 +829,7 @@ static int ct_handle_request(struct intel_guc_ct *ct, const u32 *msg)
void intel_guc_ct_event_handler(struct intel_guc_ct *ct)
{
u32 msg[GUC_CT_MSG_LEN_MASK + 1]; /* one extra dw for the header */
+ unsigned long flags;
int err = 0;
if (unlikely(!ct->enabled)) {
@@ -830,7 +838,9 @@ void intel_guc_ct_event_handler(struct intel_guc_ct *ct)
}
do {
+ spin_lock_irqsave(&ct->ctbs.recv.lock, flags);
err = ct_read(ct, msg);
+ spin_unlock_irqrestore(&ct->ctbs.recv.lock, flags);
if (err)
break;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
index fc9486779e87..bc52dc479a14 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
@@ -27,11 +27,13 @@ struct intel_guc;
* record (command transport buffer descriptor) and the actual buffer which
* holds the commands.
*
+ * @lock: protects access to the commands buffer and buffer descriptor
* @desc: pointer to the buffer descriptor
* @cmds: pointer to the commands buffer
* @size: size of the commands buffer
*/
struct intel_guc_ct_buffer {
+ spinlock_t lock;
struct guc_ct_buffer_desc *desc;
u32 *cmds;
u32 size;
--
2.28.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-26 6:25 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-26 6:42 [Intel-gfx] [PATCH 00/18] Non-interface changing GuC CTBs updates Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Non-interface changing GuC CTBs updates (rev2) Patchwork
2021-05-27 17:13 ` John Harrison
2021-05-27 17:09 ` Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 01/18] drm/i915/guc: skip disabling CTBs before sanitizing the GuC Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 02/18] drm/i915/guc: use probe_error log for CT enablement failure Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 03/18] drm/i915/guc: enable only the user interrupt when using GuC submission Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 04/18] drm/i915/guc: Remove sample_forcewake h2g action Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 05/18] drm/i915/guc: Keep strict GuC ABI definitions Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 06/18] drm/i915/guc: Drop guc->interrupts.enabled Matthew Brost
2021-05-27 17:17 ` John Harrison
2021-05-27 17:13 ` Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 07/18] drm/i915/guc: Stop using fence/status from CTB descriptor Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 08/18] drm/i915: Promote ptrdiff() to i915_utils.h Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 09/18] drm/i915/guc: Only rely on own CTB size Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 10/18] drm/i915/guc: Don't repeat CTB layout calculations Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 11/18] drm/i915/guc: Replace CTB array with explicit members Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 12/18] drm/i915/guc: Update sizes of CTB buffers Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 13/18] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-05-26 12:25 ` Michal Wajdeczko
2021-05-26 17:38 ` Matthew Brost
2021-05-26 6:42 ` Matthew Brost [this message]
2021-05-26 6:42 ` [Intel-gfx] [PATCH 15/18] drm/i915/guc: Ensure H2G buffer updates visible before tail update Matthew Brost
2021-05-26 12:36 ` Michal Wajdeczko
2021-05-26 17:58 ` Matthew Brost
2021-05-28 1:13 ` John Harrison
2021-05-28 6:52 ` Michal Wajdeczko
2021-05-26 6:42 ` [Intel-gfx] [PATCH 16/18] drm/i915/guc: Stop using mutex while sending CTB messages Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 17/18] drm/i915/guc: Don't receive all G2H messages in irq handler Matthew Brost
2021-05-26 6:42 ` [Intel-gfx] [PATCH 18/18] drm/i915/guc: Always copy CT message to new allocation Matthew Brost
2021-05-26 6:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Non-interface changing GuC CTBs updates (rev2) Patchwork
2021-05-27 17:13 ` John Harrison
2021-05-27 17:08 ` Matthew Brost
2021-05-26 7:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-26 9:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210526064237.77853-15-matthew.brost@intel.com \
--to=matthew.brost@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox