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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 8/9] drm/i915/fbc: Make the cfb allocation loop a bit more legible
Date: Thu, 10 Jun 2021 21:32:36 +0300	[thread overview]
Message-ID: <20210610183237.3920-9-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210610183237.3920-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Write the cfb allocation loop as an actual loop instead of some
hard to read goto thing.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 51 ++++++++++++------------
 1 file changed, 26 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 6415f2cfd1ac..b6bfb4439a8b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -440,44 +440,45 @@ static u64 intel_fbc_stolen_end(struct drm_i915_private *dev_priv)
 	return min(end, intel_fbc_cfb_base_max(dev_priv));
 }
 
+static int intel_fbc_max_limit(struct drm_i915_private *dev_priv, int fb_cpp)
+{
+	/*
+	 * FIXME: FBC1 can have arbitrary cfb stride,
+	 * so we could support different compression ratios.
+	 */
+	if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
+		return 1;
+
+	/* WaFbcOnly1to1Ratio:ctg */
+	if (IS_G4X(dev_priv))
+		return 1;
+
+	/* FBC2 can only do 1:1, 1:2, 1:4 */
+	return fb_cpp == 2 ? 2 : 4;
+}
+
 static int find_compression_limit(struct drm_i915_private *dev_priv,
 				  unsigned int size,
 				  unsigned int fb_cpp)
 {
 	struct intel_fbc *fbc = &dev_priv->fbc;
 	u64 end = intel_fbc_stolen_end(dev_priv);
-	int compression_limit = 1;
-	int ret;
-
-	/* HACK: This code depends on what we will do in *_enable_fbc. If that
-	 * code changes, this code needs to change as well.
-	 *
-	 * The enable_fbc code will attempt to use one of our 2 compression
-	 * limits, therefore, in that case, we only have 1 resort.
-	 */
+	int ret, limit = 1;
 
 	/* Try to over-allocate to reduce reallocations and fragmentation. */
 	ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb,
 						   size <<= 1, 4096, 0, end);
 	if (ret == 0)
-		return compression_limit;
+		return limit;
 
-again:
-	/* HW's ability to limit the CFB is 1:4 */
-	if (compression_limit > 4 ||
-	    (fb_cpp == 2 && compression_limit == 2))
-		return 0;
-
-	ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb,
-						   size >>= 1, 4096, 0, end);
-	if (ret && DISPLAY_VER(dev_priv) <= 4) {
-		return 0;
-	} else if (ret) {
-		compression_limit <<= 1;
-		goto again;
-	} else {
-		return compression_limit;
+	for (; limit <= intel_fbc_max_limit(dev_priv, fb_cpp); limit <<= 1) {
+		ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb,
+							   size >>= 1, 4096, 0, end);
+		if (ret == 0)
+			return limit;
 	}
+
+	return 0;
 }
 
 static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv,
-- 
2.31.1

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  parent reply	other threads:[~2021-06-10 18:33 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-10 18:32 [Intel-gfx] [PATCH 0/9] drm/i915/fbc: Clean up cfb allocation code Ville Syrjala
2021-06-10 18:32 ` [Intel-gfx] [PATCH 1/9] drm/i915/fbc: s/threshold/limit/ Ville Syrjala
2021-06-10 18:32 ` [Intel-gfx] [PATCH 2/9] drm/i915/fbc: Extract intel_fbc_program_cfb() Ville Syrjala
2021-06-10 18:32 ` [Intel-gfx] [PATCH 3/9] drm/i915/fbc: Embed the compressed_llb node Ville Syrjala
2021-06-10 18:32 ` [Intel-gfx] [PATCH 4/9] drm/i915/fbc: Don't pass around the mm node Ville Syrjala
2021-06-10 18:32 ` [Intel-gfx] [PATCH 5/9] drm/i915/fbc: Handle 16bpp compression limit better Ville Syrjala
2021-06-10 18:32 ` [Intel-gfx] [PATCH 6/9] drm/i915/fbc: Introduce g4x_dpfc_ctl_limit() Ville Syrjala
2021-06-10 18:32 ` [Intel-gfx] [PATCH 7/9] drm/i915/fbc: Extract intel_fbc_stolen_end() Ville Syrjala
2021-06-10 18:32 ` Ville Syrjala [this message]
2021-06-10 18:32 ` [Intel-gfx] [PATCH 9/9] drm/i915/fbc: Allocate llb before cfb Ville Syrjala
2021-06-18 21:07   ` Souza, Jose
2021-06-10 18:50 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/fbc: Clean up cfb allocation code Patchwork
2021-06-10 19:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-10 22:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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