From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 7/7] drm/i915/display/xelpd: Exetend Wa_14011508470
Date: Thu, 8 Jul 2021 14:18:27 -0700 [thread overview]
Message-ID: <20210708211827.288601-7-jose.souza@intel.com> (raw)
In-Reply-To: <20210708211827.288601-1-jose.souza@intel.com>
This workaround is also applicable to xelpd display so extending it.
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 6fc766da66054..d92db471411e5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -5883,8 +5883,8 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
if (resume && intel_dmc_has_payload(dev_priv))
intel_dmc_load_program(dev_priv);
- /* Wa_14011508470 */
- if (DISPLAY_VER(dev_priv) == 12) {
+ /* Wa_14011508470:tgl,dg1,rkl,adl-s,adl-p */
+ if (DISPLAY_VER(dev_priv) >= 12) {
val = DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR;
intel_uncore_rmw(&dev_priv->uncore, GEN11_CHICKEN_DCPR_2, 0, val);
--
2.32.0
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next prev parent reply other threads:[~2021-07-08 21:14 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 21:18 [Intel-gfx] [PATCH 1/7] drm/i915: Settle on "adl-x" in WA comments José Roberto de Souza
2021-07-08 21:18 ` [Intel-gfx] [PATCH 2/7] drm/i915: Implement Wa_1508744258 José Roberto de Souza
2021-07-10 5:06 ` Matt Roper
2021-08-12 3:27 ` Timo Aaltonen
2021-08-12 6:29 ` Timo Aaltonen
2021-08-12 15:56 ` Souza, Jose
2021-07-08 21:18 ` [Intel-gfx] [PATCH 3/7] drm/i915/adl_s: Extend Wa_1406941453 José Roberto de Souza
2021-07-10 5:07 ` Matt Roper
2021-07-08 21:18 ` [Intel-gfx] [PATCH 4/7] drm/i915: Limit maximum number of memory channels José Roberto de Souza
2021-07-08 21:18 ` [Intel-gfx] [PATCH 5/7] drm/i915: Limit Wa_22010178259 to affected platforms José Roberto de Souza
2021-07-10 5:29 ` Matt Roper
2021-07-08 21:18 ` [Intel-gfx] [PATCH 6/7] drm/i915/display/adl_p: Correctly program MBUS DBOX A credits José Roberto de Souza
2021-07-10 5:41 ` Matt Roper
2021-08-03 20:19 ` Souza, Jose
2021-08-03 22:39 ` Matt Roper
2021-07-08 21:18 ` José Roberto de Souza [this message]
2021-07-10 5:42 ` [Intel-gfx] [PATCH 7/7] drm/i915/display/xelpd: Exetend Wa_14011508470 Matt Roper
2021-07-08 23:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: Settle on "adl-x" in WA comments Patchwork
2021-07-08 23:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-09 14:30 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-07-10 4:55 ` [Intel-gfx] [PATCH 1/7] " Matt Roper
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