From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 04/16] drm/i915: Flatten hsw_crtc_compute_clock()
Date: Mon, 13 Sep 2021 17:44:28 +0300 [thread overview]
Message-ID: <20210913144440.23008-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210913144440.23008-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
hsw_crtc_compute_clock() has become spaghetti. Flatten
it a bit to make it at least semi-legible.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dpll.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 210f91f4a576..ace9157a1c30 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -937,16 +937,18 @@ static int hsw_crtc_compute_clock(struct intel_crtc_state *crtc_state)
struct intel_encoder *encoder =
intel_get_crtc_new_encoder(state, crtc_state);
- if (IS_DG2(dev_priv)) {
+ if (IS_DG2(dev_priv))
return intel_mpllb_calc_state(crtc_state, encoder);
- } else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) ||
- DISPLAY_VER(dev_priv) >= 11) {
- if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
- drm_dbg_kms(&dev_priv->drm,
- "failed to find PLL for pipe %c\n",
- pipe_name(crtc->pipe));
- return -EINVAL;
- }
+
+ if (DISPLAY_VER(dev_priv) < 11 &&
+ intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
+ return 0;
+
+ if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
+ drm_dbg_kms(&dev_priv->drm,
+ "failed to find PLL for pipe %c\n",
+ pipe_name(crtc->pipe));
+ return -EINVAL;
}
return 0;
--
2.32.0
next prev parent reply other threads:[~2021-09-13 14:44 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-13 14:44 [Intel-gfx] [PATCH 00/16] drm/i915: Fix bigjoiner state readout Ville Syrjala
2021-09-13 14:44 ` [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes" Ville Syrjala
2021-09-13 16:28 ` Souza, Jose
2021-09-14 8:20 ` Ville Syrjälä
2021-09-14 23:24 ` Souza, Jose
2021-09-15 0:00 ` Souza, Jose
2021-09-15 12:30 ` Ville Syrjälä
2021-09-15 20:19 ` Souza, Jose
2021-09-16 13:21 ` Ville Syrjälä
2021-09-17 0:14 ` Souza, Jose
2021-09-13 14:44 ` [Intel-gfx] [PATCH 02/16] drm/i915: Disable all planes before modesetting any pipes Ville Syrjala
2021-09-20 7:52 ` Navare, Manasi
2021-09-21 12:49 ` Ville Syrjälä
2021-09-27 11:20 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 03/16] drm/i915: Extract intel_dp_use_bigjoiner() Ville Syrjala
2021-09-15 10:12 ` Jani Nikula
2021-09-15 15:39 ` Ville Syrjälä
2021-09-21 11:10 ` Navare, Manasi
2021-09-13 14:44 ` Ville Syrjala [this message]
2021-09-15 10:13 ` [Intel-gfx] [PATCH 04/16] drm/i915: Flatten hsw_crtc_compute_clock() Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 05/16] drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF Ville Syrjala
2021-09-15 10:16 ` Jani Nikula
2021-09-15 13:00 ` Ville Syrjälä
2021-09-15 13:17 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 06/16] drm/i915: Introduce with_intel_display_power_if_enabled() Ville Syrjala
2021-09-15 13:22 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 07/16] drm/i915: Adjust intel_dsc_power_domain() calling convention Ville Syrjala
2021-09-15 10:19 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 08/16] drm/i915: Extract hsw_panel_transcoders() Ville Syrjala
2021-09-15 10:20 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 09/16] drm/i915: Pimp HSW+ transcoder state readout Ville Syrjala
2021-09-21 11:46 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 10/16] drm/i915: Configure TRANSCONF just the once with bigjoiner Ville Syrjala
2021-09-21 11:51 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 11/16] drm/i915: Introduce intel_master_crtc() Ville Syrjala
2021-09-15 10:24 ` Jani Nikula
2021-09-15 12:21 ` Ville Syrjälä
2021-10-21 23:27 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 12/16] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset() Ville Syrjala
2021-09-27 11:27 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 13/16] drm/i915: Split PPS write from DSC enable Ville Syrjala
2021-09-27 12:01 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 14/16] drm/i915: Perform correct cpu_transcoder readout for bigjoiner Ville Syrjala
2021-10-20 20:35 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 15/16] drm/i915: Reduce bigjoiner special casing Ville Syrjala
2021-10-20 23:52 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 16/16] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE Ville Syrjala
2021-10-20 23:53 ` Navare, Manasi
2021-09-13 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bigjoiner state readout Patchwork
2021-09-13 16:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-13 18:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210913144440.23008-5-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox