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From: "Navare, Manasi" <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 14/16] drm/i915: Perform correct cpu_transcoder readout for bigjoiner
Date: Wed, 20 Oct 2021 13:35:32 -0700	[thread overview]
Message-ID: <20211020203531.GA25526@labuser-Z97X-UD5H> (raw)
In-Reply-To: <20210913144440.23008-15-ville.syrjala@linux.intel.com>

On Mon, Sep 13, 2021 at 05:44:38PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Read out cpu_transcoder correctly for the bigjoiner slave pipes.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 66 ++++++++++++++++++++
>  1 file changed, 66 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 4e659a103984..25ae9e4f6b66 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5581,6 +5581,16 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
>  	return ret;
>  }
>  
> +static u8 bigjoiner_pipes(struct drm_i915_private *i915)


> +{
> +	if (DISPLAY_VER(i915) >= 12)
> +		return BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D);
> +	else if (DISPLAY_VER(i915) >= 11)
> +		return BIT(PIPE_B) | BIT(PIPE_C);
> +	else
> +		return 0;
> +}
> +
>  static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
>  					   enum transcoder cpu_transcoder)
>  {
> @@ -5596,6 +5606,54 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
>  	return tmp & TRANS_DDI_FUNC_ENABLE;
>  }
>  
> +static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
> +{
> +	u8 master_pipes = 0, slave_pipes = 0;
> +	struct intel_crtc *crtc;
> +
> +	for_each_intel_crtc(&dev_priv->drm, crtc) {
> +		enum intel_display_power_domain power_domain;
> +		enum pipe pipe = crtc->pipe;
> +		intel_wakeref_t wakeref;
> +
> +		if ((bigjoiner_pipes(dev_priv) & BIT(pipe)) == 0)
> +			continue;
> +
> +		power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);
> +		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
> +			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
> +
> +			if (!(tmp & BIG_JOINER_ENABLE))
> +				continue;
> +
> +			if (tmp & MASTER_BIG_JOINER_ENABLE)
> +				master_pipes |= BIT(pipe);
> +			else
> +				slave_pipes |= BIT(pipe);
> +		}
> +
> +		if (DISPLAY_VER(dev_priv) < 13)
> +			continue;
> +
> +		power_domain = POWER_DOMAIN_PIPE(pipe);
> +		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
> +			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
> +
> +			if (tmp & UNCOMPRESSED_JOINER_MASTER)
> +				master_pipes |= BIT(pipe);
> +			if (tmp & UNCOMPRESSED_JOINER_SLAVE)
> +				slave_pipes |= BIT(pipe);
> +		}
> +	}
> +
> +	/* Bigjoiner pipes should always be consecutive master and slave */
> +	drm_WARN(&dev_priv->drm, slave_pipes != master_pipes << 1,
> +		 "Bigjoiner misconfigured (master pipes 0x%x, slave pipes 0x%x)\n",
> +		 master_pipes, slave_pipes);
> +
> +	return slave_pipes;
> +}
> +
>  static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
>  {
>  	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
> @@ -5657,10 +5715,18 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
>  			enabled_transcoders |= BIT(cpu_transcoder);
>  	}
>  
> +	/* single pipe or bigjoiner master */
>  	cpu_transcoder = (enum transcoder) crtc->pipe;
>  	if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
>  		enabled_transcoders |= BIT(cpu_transcoder);
>  
> +	/* bigjoiner slave -> consider the master pipe's transcoder as well */
> +	if (enabled_bigjoiner_pipes(dev_priv) & BIT(crtc->pipe)) {
> +		cpu_transcoder = (enum transcoder) crtc->pipe - 1;
> +		if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
> +			enabled_transcoders |= BIT(cpu_transcoder);
> +	}
> +
>  	return enabled_transcoders;
>  }
>  
> -- 
> 2.32.0
> 

  reply	other threads:[~2021-10-20 20:23 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-13 14:44 [Intel-gfx] [PATCH 00/16] drm/i915: Fix bigjoiner state readout Ville Syrjala
2021-09-13 14:44 ` [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes" Ville Syrjala
2021-09-13 16:28   ` Souza, Jose
2021-09-14  8:20     ` Ville Syrjälä
2021-09-14 23:24       ` Souza, Jose
2021-09-15  0:00         ` Souza, Jose
2021-09-15 12:30           ` Ville Syrjälä
2021-09-15 20:19             ` Souza, Jose
2021-09-16 13:21               ` Ville Syrjälä
2021-09-17  0:14                 ` Souza, Jose
2021-09-13 14:44 ` [Intel-gfx] [PATCH 02/16] drm/i915: Disable all planes before modesetting any pipes Ville Syrjala
2021-09-20  7:52   ` Navare, Manasi
2021-09-21 12:49     ` Ville Syrjälä
2021-09-27 11:20       ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 03/16] drm/i915: Extract intel_dp_use_bigjoiner() Ville Syrjala
2021-09-15 10:12   ` Jani Nikula
2021-09-15 15:39     ` Ville Syrjälä
2021-09-21 11:10   ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 04/16] drm/i915: Flatten hsw_crtc_compute_clock() Ville Syrjala
2021-09-15 10:13   ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 05/16] drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF Ville Syrjala
2021-09-15 10:16   ` Jani Nikula
2021-09-15 13:00     ` Ville Syrjälä
2021-09-15 13:17       ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 06/16] drm/i915: Introduce with_intel_display_power_if_enabled() Ville Syrjala
2021-09-15 13:22   ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 07/16] drm/i915: Adjust intel_dsc_power_domain() calling convention Ville Syrjala
2021-09-15 10:19   ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 08/16] drm/i915: Extract hsw_panel_transcoders() Ville Syrjala
2021-09-15 10:20   ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 09/16] drm/i915: Pimp HSW+ transcoder state readout Ville Syrjala
2021-09-21 11:46   ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 10/16] drm/i915: Configure TRANSCONF just the once with bigjoiner Ville Syrjala
2021-09-21 11:51   ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 11/16] drm/i915: Introduce intel_master_crtc() Ville Syrjala
2021-09-15 10:24   ` Jani Nikula
2021-09-15 12:21     ` Ville Syrjälä
2021-10-21 23:27   ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 12/16] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset() Ville Syrjala
2021-09-27 11:27   ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 13/16] drm/i915: Split PPS write from DSC enable Ville Syrjala
2021-09-27 12:01   ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 14/16] drm/i915: Perform correct cpu_transcoder readout for bigjoiner Ville Syrjala
2021-10-20 20:35   ` Navare, Manasi [this message]
2021-09-13 14:44 ` [Intel-gfx] [PATCH 15/16] drm/i915: Reduce bigjoiner special casing Ville Syrjala
2021-10-20 23:52   ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 16/16] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE Ville Syrjala
2021-10-20 23:53   ` Navare, Manasi
2021-09-13 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bigjoiner state readout Patchwork
2021-09-13 16:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-13 18:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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