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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Gwan-gyeong Mun" <gwan-gyeong.mun@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"José Roberto de Souza" <jose.souza@intel.com>
Subject: [Intel-gfx] [PATCH 2/7] drm/i915/display: Handle frontbuffer rendering when PSR2 selective fetch is enabled
Date: Thu, 23 Sep 2021 12:46:12 -0700	[thread overview]
Message-ID: <20210923194617.69136-2-jose.souza@intel.com> (raw)
In-Reply-To: <20210923194617.69136-1-jose.souza@intel.com>

CURSURFLIVE writes has no affect when PSR2 selective fetch is enabled,
the right thing to do here would be calculate the damaged area and
program PSR2 selective fetch registers properly during vblank but
we can't do that due to performance reasons.

So for now we can workaround and offer proper rendering by disabling
PSR2 and enabling in the worker a few miliseconds later if there is
no other frontbuffer rendering.

This approach will eat some of the PSR2 power savings when userspace
makes use of frontbuffer rendering but that is the solution that we
can offer to enable PSR2 selective fetch right now while we work in
the proper solution for frontbuffer rendering and PSR2.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a2e4ef42be60a..ba2da689920f9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1413,6 +1413,12 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
+	/* CURSURFLIVE has no effect when Selective fetch is enabled */
+	if (intel_dp->psr.psr2_sel_fetch_enabled) {
+		intel_psr_exit(intel_dp);
+		return;
+	}
+
 	/*
 	 * Display WA #0884: skl+
 	 * This documented WA for bxt can be safely applied
-- 
2.33.0


  reply	other threads:[~2021-09-23 19:40 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-23 19:46 [Intel-gfx] [PATCH 1/7] drm/i915/display: Wait PSR2 get out of deep sleep to update pipe José Roberto de Souza
2021-09-23 19:46 ` José Roberto de Souza [this message]
2021-09-29 12:40   ` [Intel-gfx] [PATCH 2/7] drm/i915/display: Handle frontbuffer rendering when PSR2 selective fetch is enabled Gwan-gyeong Mun
2021-09-23 19:46 ` [Intel-gfx] [PATCH 3/7] drm/i915/display: Add new fb_op_origin type and use it to optimize power savings José Roberto de Souza
2021-09-24 14:39   ` Ville Syrjälä
2021-09-24 17:11     ` Souza, Jose
2021-09-23 19:46 ` [Intel-gfx] [PATCH 4/7] drm/i915/display/psr: Handle plane restrictions at every page flip José Roberto de Souza
2021-09-29 17:50   ` Gwan-gyeong Mun
2021-09-29 18:20     ` Ville Syrjälä
2021-09-30  5:35       ` Gwan-gyeong Mun
2021-09-30  6:55         ` Ville Syrjälä
2021-09-23 19:46 ` [Intel-gfx] [PATCH 5/7] drm/i915/display/psr: Do full fetch when handling biplanar formats José Roberto de Souza
2021-09-24 14:41   ` Ville Syrjälä
2021-09-23 19:46 ` [Intel-gfx] [PATCH 6/7] drm/i915/display/adlp: Allow PSR2 to be enabled José Roberto de Souza
2021-09-29 13:29   ` Gwan-gyeong Mun
2021-09-23 19:46 ` [Intel-gfx] [PATCH 7/7] drm/i915/display: Enable PSR2 selective fetch by default José Roberto de Souza
2021-09-29 13:26   ` Gwan-gyeong Mun
2021-09-23 20:44 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/7] drm/i915/display: Wait PSR2 get out of deep sleep to update pipe Patchwork
2021-09-23 21:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-24  1:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-24 14:35 ` [Intel-gfx] [PATCH 1/7] " Ville Syrjälä
2021-09-24 17:10   ` Souza, Jose
2021-09-27 16:25     ` Ville Syrjälä

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