* [Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping
@ 2021-11-17 7:41 Lee Shawn C
2021-11-17 9:14 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2021-11-22 13:32 ` [Intel-gfx] [PATCH] " Lee, Shawn C
0 siblings, 2 replies; 4+ messages in thread
From: Lee Shawn C @ 2021-11-17 7:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, William Tseng, Jani Nikula, Lucas De Marchi
From VBT, ddc pin info suggests the following mapping:
VBT DRIVER
DDI A->ddc_pin=1 should translate to PORT_A->0x1
DDI B->ddc_pin=2 should translate to PORT_B->0x2
TCP 0->ddc_pin=3 should translate to PORT_TC1->0x9
TCP 1->ddc_pin=4 should translate to PORT_TC2->0xa
TCP 2->ddc_pin=5 should translate to PORT_TC3->0xb
TCP 3->ddc_pin=6 should translate to PORT_TC4->0xc
Adding adl_p pin map to facilitate this translation
as we cannot use existing icl ddc pin map due to
DDI C is not available on adl-p platform.
Bspec:20124
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: William Tseng <william.tseng@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 12 ++++++++++++
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 6 +++++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 2b1423a43437..c1479e61f032 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1549,6 +1549,15 @@ static const u8 adls_ddc_pin_map[] = {
[ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
};
+static const u8 adlp_ddc_pin_map[] = {
+ [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
+ [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+ [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
+ [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
+ [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
+ [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
+};
+
static const u8 gen9bc_tgp_ddc_pin_map[] = {
[DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
[DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
@@ -1563,6 +1572,9 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
if (IS_ALDERLAKE_S(i915)) {
ddc_pin_map = adls_ddc_pin_map;
n_entries = ARRAY_SIZE(adls_ddc_pin_map);
+ } else if (IS_ALDERLAKE_P(i915)) {
+ ddc_pin_map = adlp_ddc_pin_map;
+ n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
return vbt_pin;
} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index a2108a8f544d..d5be01b983f4 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -330,7 +330,11 @@ enum vbt_gmbus_ddi {
ADLS_DDC_BUS_PORT_TC1 = 0x2,
ADLS_DDC_BUS_PORT_TC2,
ADLS_DDC_BUS_PORT_TC3,
- ADLS_DDC_BUS_PORT_TC4
+ ADLS_DDC_BUS_PORT_TC4,
+ ADLP_DDC_BUS_PORT_TC1 = 0x3,
+ ADLP_DDC_BUS_PORT_TC2,
+ ADLP_DDC_BUS_PORT_TC3,
+ ADLP_DDC_BUS_PORT_TC4,
};
#define DP_AUX_A 0x40
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/adl_p: Add adl-p ddc pin mapping
2021-11-17 7:41 [Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping Lee Shawn C
@ 2021-11-17 9:14 ` Patchwork
2021-11-22 13:32 ` [Intel-gfx] [PATCH] " Lee, Shawn C
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2021-11-17 9:14 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7542 bytes --]
== Series Details ==
Series: drm/i915/adl_p: Add adl-p ddc pin mapping
URL : https://patchwork.freedesktop.org/series/97009/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10889 -> Patchwork_21611
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_21611 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21611, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/index.html
Participating hosts (37 -> 35)
------------------------------
Additional (2): fi-kbl-soraka fi-icl-u2
Missing (4): fi-ctg-p8600 fi-bsw-cyan bat-dg1-6 fi-hsw-4200u
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21611:
### IGT changes ###
#### Possible regressions ####
* igt@kms_psr@primary_page_flip:
- fi-skl-6600u: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10889/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
Known issues
------------
Here are the changes found in Patchwork_21611 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> [SKIP][3] ([fdo#109315]) +17 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-icl-u2/igt@amdgpu/amd_cs_nop@fork-gfx0.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271]) +8 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_exec_suspend@basic-s0:
- fi-tgl-1115g4: [PASS][5] -> [FAIL][6] ([i915#1888])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10889/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
- fi-icl-u2: NOTRUN -> [SKIP][8] ([i915#2190])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@i915_selftest@live@execlists:
- fi-bsw-kefka: [PASS][9] -> [INCOMPLETE][10] ([i915#2940])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10889/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][11] ([i915#1886] / [i915#2291])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827]) +8 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][13] ([fdo#111827]) +8 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: NOTRUN -> [SKIP][14] ([fdo#109278]) +2 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2: NOTRUN -> [SKIP][15] ([fdo#109285])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#533])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@prime_vgem@basic-userptr:
- fi-icl-u2: NOTRUN -> [SKIP][17] ([i915#3301])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-icl-u2/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-bsw-kefka: NOTRUN -> [FAIL][18] ([fdo#109271] / [i915#1436] / [i915#2722] / [i915#3428] / [i915#4312])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-bsw-kefka/igt@runner@aborted.html
- fi-skl-6600u: NOTRUN -> [FAIL][19] ([i915#3363] / [i915#4312])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-skl-6600u/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- {fi-hsw-gt1}: [DMESG-WARN][20] ([i915#3303]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10889/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_10889 -> Patchwork_21611
CI-20190529: 20190529
CI_DRM_10889: ad3abb03c359049afc8c9589f194d50c0b70f916 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6281: 551f33d68fc780e3d264abd69ec59fe1af1bb65b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21611: 529c7bff2737fa118bf7d414d083b91f0c08e89e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
529c7bff2737 drm/i915/adl_p: Add adl-p ddc pin mapping
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21611/index.html
[-- Attachment #2: Type: text/html, Size: 9024 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping
2021-11-17 7:41 [Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping Lee Shawn C
2021-11-17 9:14 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2021-11-22 13:32 ` Lee, Shawn C
1 sibling, 0 replies; 4+ messages in thread
From: Lee, Shawn C @ 2021-11-22 13:32 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org
Cc: Chiou, Cooper, Tseng, William, Nikula, Jani, De Marchi, Lucas
Hi all,
May I have your comment for this patch? Thank you!
Best regards,
Shawn
>From VBT, ddc pin info suggests the following mapping:
>VBT DRIVER
>DDI A->ddc_pin=1 should translate to PORT_A->0x1
>DDI B->ddc_pin=2 should translate to PORT_B->0x2
>TCP 0->ddc_pin=3 should translate to PORT_TC1->0x9
>TCP 1->ddc_pin=4 should translate to PORT_TC2->0xa
>TCP 2->ddc_pin=5 should translate to PORT_TC3->0xb
>TCP 3->ddc_pin=6 should translate to PORT_TC4->0xc
>
>Adding adl_p pin map to facilitate this translation
>as we cannot use existing icl ddc pin map due to
>DDI C is not available on adl-p platform.
>
>Bspec:20124
>
>Cc: Jani Nikula <jani.nikula@intel.com>
>Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>Cc: Imre Deak <imre.deak@intel.com>
>Cc: Matt Roper <matthew.d.roper@intel.com>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Cc: Cooper Chiou <cooper.chiou@intel.com>
>Cc: William Tseng <william.tseng@intel.com>
>Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_bios.c | 12 ++++++++++++
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 6 +++++-
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
>index 2b1423a43437..c1479e61f032 100644
>--- a/drivers/gpu/drm/i915/display/intel_bios.c
>+++ b/drivers/gpu/drm/i915/display/intel_bios.c
>@@ -1549,6 +1549,15 @@ static const u8 adls_ddc_pin_map[] = {
> [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, };
>
>+static const u8 adlp_ddc_pin_map[] = {
>+ [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
>+ [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
>+ [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
>+ [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
>+ [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
>+ [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, };
>+
> static const u8 gen9bc_tgp_ddc_pin_map[] = {
> [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
> [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP, @@ -1563,6 +1572,9 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
> if (IS_ALDERLAKE_S(i915)) {
> ddc_pin_map = adls_ddc_pin_map;
> n_entries = ARRAY_SIZE(adls_ddc_pin_map);
>+ } else if (IS_ALDERLAKE_P(i915)) {
>+ ddc_pin_map = adlp_ddc_pin_map;
>+ n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
> } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
> return vbt_pin;
> } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
>index a2108a8f544d..d5be01b983f4 100644
>--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
>+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
>@@ -330,7 +330,11 @@ enum vbt_gmbus_ddi {
> ADLS_DDC_BUS_PORT_TC1 = 0x2,
> ADLS_DDC_BUS_PORT_TC2,
> ADLS_DDC_BUS_PORT_TC3,
>- ADLS_DDC_BUS_PORT_TC4
>+ ADLS_DDC_BUS_PORT_TC4,
>+ ADLP_DDC_BUS_PORT_TC1 = 0x3,
>+ ADLP_DDC_BUS_PORT_TC2,
>+ ADLP_DDC_BUS_PORT_TC3,
>+ ADLP_DDC_BUS_PORT_TC4,
> };
>
> #define DP_AUX_A 0x40
>--
>2.17.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping
@ 2021-12-01 12:09 ravitejax.goud.talla
0 siblings, 0 replies; 4+ messages in thread
From: ravitejax.goud.talla @ 2021-12-01 12:09 UTC (permalink / raw)
To: intel-gfx, tejaskumarx.surendrakumar.upadhyay; +Cc: ravitejax.goud.talla
From: raviteja goud talla <ravitejax.goud.talla@intel.com>
From VBT, ddc pin info suggests the following mapping:
VBT DRIVER
DDI TC1->ddc_pin=3 should translate to PORT_TC1->0x9
DDI TC2->ddc_pin=4 should translate to PORT_TC2->0xa
DDI TC3->ddc_pin=5 should translate to PORT_TC3->0xb
DDI TC4->ddc_pin=6 should translate to PORT_TC4->0xc
Adding pin map to facilitate this translation as we cannot use existing
icl ddc pin map due to conflict with DDI C and DDI TC1 info.
Bspec:20124
Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: raviteja goud talla <ravitejax.goud.talla@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 14 +++++++++++++-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 7 ++++++-
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 2b1423a43437..9d989c9f5da4 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1555,12 +1555,24 @@ static const u8 gen9bc_tgp_ddc_pin_map[] = {
[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
};
+static const u8 adlp_ddc_pin_map[] = {
+ [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
+ [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+ [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
+ [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
+ [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
+ [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
+};
+
static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
{
const u8 *ddc_pin_map;
int n_entries;
- if (IS_ALDERLAKE_S(i915)) {
+ if (IS_ALDERLAKE_P(i915)) {
+ ddc_pin_map = adlp_ddc_pin_map;
+ n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
+ } else if (IS_ALDERLAKE_S(i915)) {
ddc_pin_map = adls_ddc_pin_map;
n_entries = ARRAY_SIZE(adls_ddc_pin_map);
} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index a2108a8f544d..f043d85ba64d 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -330,7 +330,12 @@ enum vbt_gmbus_ddi {
ADLS_DDC_BUS_PORT_TC1 = 0x2,
ADLS_DDC_BUS_PORT_TC2,
ADLS_DDC_BUS_PORT_TC3,
- ADLS_DDC_BUS_PORT_TC4
+ ADLS_DDC_BUS_PORT_TC4,
+ ADLP_DDC_BUS_PORT_TC1 = 0x3,
+ ADLP_DDC_BUS_PORT_TC2,
+ ADLP_DDC_BUS_PORT_TC3,
+ ADLP_DDC_BUS_PORT_TC4
+
};
#define DP_AUX_A 0x40
--
2.30.2
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2021-11-17 7:41 [Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping Lee Shawn C
2021-11-17 9:14 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2021-11-22 13:32 ` [Intel-gfx] [PATCH] " Lee, Shawn C
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