From: Vidya Srinivas <vidya.srinivas@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Yashashvi Shantam <shantam.yashashvi@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width
Date: Tue, 30 Nov 2021 21:35:34 +0530 [thread overview]
Message-ID: <20211130160534.7983-1-vidya.srinivas@intel.com> (raw)
In-Reply-To: <20211118062516.22535-1-vidya.srinivas@intel.com>
PLANE_CUS_CTL has a restriction of 4096 width even though
PLANE_SIZE and scaler size registers supports max 5120.
Take care of this restriction in max_width.
Without this patch, when 5k content is sent on HDR plane
with NV12 content, FIFO underrun is seen and screen blanks
out.
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Yashashvi Shantam <shantam.yashashvi@intel.com>
Change-Id: If629c478ba044c8bde633de9f0fc638aa6c44233
---
.../gpu/drm/i915/display/intel_display_types.h | 3 ++-
.../gpu/drm/i915/display/skl_universal_plane.c | 17 +++++++++++++----
2 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ea1e8a6e10b0..0455ea340329 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1358,7 +1358,8 @@ struct intel_plane {
int (*min_width)(const struct drm_framebuffer *fb,
int color_plane,
unsigned int rotation);
- int (*max_width)(const struct drm_framebuffer *fb,
+ int (*max_width)(struct intel_plane *plane,
+ const struct drm_framebuffer *fb,
int color_plane,
unsigned int rotation);
int (*max_height)(const struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 28890876bdeb..a49829c5a863 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -313,7 +313,8 @@ static int skl_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
return DIV_ROUND_UP(pixel_rate * num, den);
}
-static int skl_plane_max_width(const struct drm_framebuffer *fb,
+static int skl_plane_max_width(struct intel_plane *plane,
+ const struct drm_framebuffer *fb,
int color_plane,
unsigned int rotation)
{
@@ -352,7 +353,8 @@ static int skl_plane_max_width(const struct drm_framebuffer *fb,
}
}
-static int glk_plane_max_width(const struct drm_framebuffer *fb,
+static int glk_plane_max_width(struct intel_plane *plane,
+ const struct drm_framebuffer *fb,
int color_plane,
unsigned int rotation)
{
@@ -420,10 +422,17 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb,
}
}
-static int icl_plane_max_width(const struct drm_framebuffer *fb,
+static int icl_plane_max_width(struct intel_plane *plane,
+ const struct drm_framebuffer *fb,
int color_plane,
unsigned int rotation)
{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+
+ if (icl_is_hdr_plane(dev_priv, plane->id) &&
+ intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
+ return 4096;
+
return 5120;
}
@@ -1377,7 +1386,7 @@ static int intel_plane_max_width(struct intel_plane *plane,
unsigned int rotation)
{
if (plane->max_width)
- return plane->max_width(fb, color_plane, rotation);
+ return plane->max_width(plane, fb, color_plane, rotation);
else
return INT_MAX;
}
--
2.33.0
next prev parent reply other threads:[~2021-11-30 16:14 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-18 6:25 [Intel-gfx] [PATCH] drm/i915: Reject 5k on HDR planes for planar fb formats Vidya Srinivas
2021-11-18 7:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-11-18 15:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-11-30 9:30 ` [Intel-gfx] [PATCH] " Ville Syrjälä
2021-11-30 16:20 ` Srinivas, Vidya
2021-11-30 16:05 ` Vidya Srinivas [this message]
2021-11-30 16:30 ` [Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width Ville Syrjälä
2021-11-30 17:25 ` Srinivas, Vidya
2021-11-30 16:56 ` Vidya Srinivas
2021-11-30 17:12 ` Vidya Srinivas
2021-11-30 18:09 ` Ville Syrjälä
2021-12-01 1:33 ` Srinivas, Vidya
2021-12-01 1:23 ` Vidya Srinivas
2021-12-01 1:35 ` Vidya Srinivas
2021-12-01 3:47 ` Vidya Srinivas
2021-12-01 15:02 ` Ville Syrjälä
2021-12-02 3:25 ` Srinivas, Vidya
2021-12-02 10:55 ` Ville Syrjälä
2021-12-02 11:10 ` Srinivas, Vidya
2021-12-02 11:13 ` Ville Syrjälä
2021-12-02 11:19 ` Srinivas, Vidya
2021-12-02 11:08 ` Vidya Srinivas
2021-12-02 13:06 ` Ville Syrjälä
2021-12-02 16:59 ` Srinivas, Vidya
2021-11-30 16:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev2) Patchwork
2021-11-30 16:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-30 17:27 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-11-30 17:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev4) Patchwork
2021-11-30 18:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-30 19:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev5) Patchwork
2021-11-30 19:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-01 3:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev7) Patchwork
2021-12-01 4:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev8) Patchwork
2021-12-01 4:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject 5k on HDR planes for planar fb formats (rev7) Patchwork
2021-12-01 4:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject 5k on HDR planes for planar fb formats (rev8) Patchwork
2021-12-01 7:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-12-02 13:01 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev9) Patchwork
2021-12-02 13:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-02 16:48 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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