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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Vidya Srinivas <vidya.srinivas@intel.com>
Cc: Yashashvi Shantam <shantam.yashashvi@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Reject 5k on HDR planes for planar fb formats
Date: Tue, 30 Nov 2021 11:30:40 +0200	[thread overview]
Message-ID: <YaXvQAJKC10ehQ2q@intel.com> (raw)
In-Reply-To: <20211118062516.22535-1-vidya.srinivas@intel.com>

On Thu, Nov 18, 2021 at 11:55:16AM +0530, Vidya Srinivas wrote:
> PLANE_CUS_CTL has a restriction of 4096 width even though
> PLANE_SIZE and scaler size registers supports max 5120.
> Reject 5k on HDR plane for planar formats like NV12
> to let the user space know about it.
> 
> Without this patch, when 5k content is sent on HDR plane
> with NV12 content, FIFO underrun is seen and screen blanks
> out. Issue is seen on both TGL and ADL platforms.
> 
> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> Signed-off-by: Yashashvi Shantam <shantam.yashashvi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_scaler.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 37eabeff8197..e2e52f5dca3b 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -86,6 +86,7 @@ static u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_cosited)
>  #define ICL_MAX_DST_H 4096
>  #define SKL_MIN_YUV_420_SRC_W 16
>  #define SKL_MIN_YUV_420_SRC_H 16
> +#define MAX_CUSCTL_W 4096
>  
>  static int
>  skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> @@ -221,6 +222,14 @@ int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>  	bool force_detach = !fb || !plane_state->uapi.visible;
>  	bool need_scaler = false;
>  
> +	/* PLANE_CUS_CTL size max 4096 */
> +	if (icl_is_hdr_plane(dev_priv, intel_plane->id) &&
> +	    fb && intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
> +	    (drm_rect_width(&plane_state->uapi.src) >> 16) > MAX_CUSCTL_W) {
> +		DRM_ERROR("HDR chroma upsampler size exceeds limits\n");
> +		return -EINVAL;
> +	}

Wrong place. Should go into the plane->max_width() hook. There also
seems to be a minimum height requirement for the CUS which we're not
checking either.

> +
>  	/* Pre-gen11 and SDR planes always need a scaler for planar formats. */
>  	if (!icl_is_hdr_plane(dev_priv, intel_plane->id) &&
>  	    fb && intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
> -- 
> 2.33.0

-- 
Ville Syrjälä
Intel

  parent reply	other threads:[~2021-11-30  9:30 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-18  6:25 [Intel-gfx] [PATCH] drm/i915: Reject 5k on HDR planes for planar fb formats Vidya Srinivas
2021-11-18  7:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-11-18 15:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-11-30  9:30 ` Ville Syrjälä [this message]
2021-11-30 16:20   ` [Intel-gfx] [PATCH] " Srinivas, Vidya
2021-11-30 16:05 ` [Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width Vidya Srinivas
2021-11-30 16:30   ` Ville Syrjälä
2021-11-30 17:25     ` Srinivas, Vidya
2021-11-30 16:56   ` Vidya Srinivas
2021-11-30 17:12   ` Vidya Srinivas
2021-11-30 18:09     ` Ville Syrjälä
2021-12-01  1:33       ` Srinivas, Vidya
2021-12-01  1:23     ` Vidya Srinivas
2021-12-01  1:35     ` Vidya Srinivas
2021-12-01  3:47     ` Vidya Srinivas
2021-12-01 15:02       ` Ville Syrjälä
2021-12-02  3:25         ` Srinivas, Vidya
2021-12-02 10:55           ` Ville Syrjälä
2021-12-02 11:10             ` Srinivas, Vidya
2021-12-02 11:13               ` Ville Syrjälä
2021-12-02 11:19                 ` Srinivas, Vidya
2021-12-02 11:08       ` Vidya Srinivas
2021-12-02 13:06         ` Ville Syrjälä
2021-12-02 16:59           ` Srinivas, Vidya
2021-11-30 16:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev2) Patchwork
2021-11-30 16:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-30 17:27 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-11-30 17:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev4) Patchwork
2021-11-30 18:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-30 19:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev5) Patchwork
2021-11-30 19:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-01  3:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev7) Patchwork
2021-12-01  4:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev8) Patchwork
2021-12-01  4:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject 5k on HDR planes for planar fb formats (rev7) Patchwork
2021-12-01  4:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject 5k on HDR planes for planar fb formats (rev8) Patchwork
2021-12-01  7:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-12-02 13:01 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reject 5k on HDR planes for planar fb formats (rev9) Patchwork
2021-12-02 13:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-02 16:48 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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