[Intel-gfx] [PATCH v5 0/1] Introduce new i915 macros for checking PTEs

[Michael Cheng <michael.cheng@intel.com>]

This series is to introduce new macros generic to i915 for checking 0 and 1 
bits, instead on relying on whats defined by the mmu, since it could 
be different or non-exisitent between different platforms.

v2: Corrected sender's email.

v3: Corrected spelling error.

v4: Clean up a few other macros that are checking 0 and 1 bits. 
Thanks to Lucas De Marchi for suggesting these cleanups. 

v5: Remove changes to GEN6_PTE_VALID/GEN6_PDE_VALID and BYT_PTE_WRITEABLE.
Those macros checks for 32bit PTEs, and our new macro is checking for 64bit.

Michael Cheng (1):
  drm/i915: Introduce new macros for i915 PTE

 drivers/gpu/drm/i915/gt/gen8_ppgtt.c |  6 +++---
 drivers/gpu/drm/i915/gt/intel_ggtt.c |  2 +-
 drivers/gpu/drm/i915/gt/intel_gtt.h  |  3 +++
 drivers/gpu/drm/i915/gvt/gtt.c       | 12 ++++++------
 4 files changed, 13 insertions(+), 10 deletions(-)

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2.25.1