* [Intel-gfx] [v3 1/3] drm/i915/xelpd: Enable Pipe color support for D13 platform
2021-12-07 7:11 [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform Uma Shankar
@ 2021-12-07 7:11 ` Uma Shankar
2021-12-07 7:11 ` [Intel-gfx] [v3 2/3] drm/i915/xelpd: Enable Pipe Degamma Uma Shankar
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Uma Shankar @ 2021-12-07 7:11 UTC (permalink / raw)
To: intel-gfx
Enable pipe color support for Display 13 platforms. Currently
limit to just 10bit gamma and later extend it for logarithmic
gamma, once the new UAPI is agreed by community and implemented
by a userspace consumer.
v2: Updated dev_priv to i915 (Ville)
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 840f13b75492..42fe549ef6fe 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1574,6 +1574,8 @@ static int glk_color_check(struct intel_crtc_state *crtc_state)
static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
u32 gamma_mode = 0;
if (crtc_state->hw.degamma_lut)
@@ -1586,6 +1588,13 @@ static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
if (!crtc_state->hw.gamma_lut ||
crtc_state_is_legacy_gamma(crtc_state))
gamma_mode |= GAMMA_MODE_MODE_8BIT;
+ /*
+ * Enable 10bit gamma for D13
+ * ToDo: Extend to Logarithmic Gamma once the new UAPI
+ * is acccepted and implemented by a userspace consumer
+ */
+ else if (DISPLAY_VER(i915) >= 13)
+ gamma_mode |= GAMMA_MODE_MODE_10BIT;
else
gamma_mode |= GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED;
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [Intel-gfx] [v3 2/3] drm/i915/xelpd: Enable Pipe Degamma
2021-12-07 7:11 [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform Uma Shankar
2021-12-07 7:11 ` [Intel-gfx] [v3 1/3] drm/i915/xelpd: Enable Pipe color support for " Uma Shankar
@ 2021-12-07 7:11 ` Uma Shankar
2021-12-07 7:11 ` [Intel-gfx] [v3 3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform config Uma Shankar
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Uma Shankar @ 2021-12-07 7:11 UTC (permalink / raw)
To: intel-gfx
Enable Pipe Degamma for XE_LPD. Extend the legacy implementation
to incorparate the extended lut size for XE_LPD.
v2: Added a helper for degamma lut size (Ville)
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 42fe549ef6fe..de3ded1e327a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -808,6 +808,14 @@ static void bdw_load_luts(const struct intel_crtc_state *crtc_state)
}
}
+static int glk_degamma_lut_size(struct drm_i915_private *i915)
+{
+ if (DISPLAY_VER(i915) >= 13)
+ return 131;
+ else
+ return 35;
+}
+
static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -827,8 +835,8 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
for (i = 0; i < lut_size; i++) {
/*
- * First 33 entries represent range from 0 to 1.0
- * 34th and 35th entry will represent extended range
+ * First lut_size entries represent range from 0 to 1.0
+ * 3 additional lut entries will represent extended range
* inputs 3.0 and 7.0 respectively, currently clamped
* at 1.0. Since the precision is 16bit, the user
* value can be directly filled to register.
@@ -844,7 +852,7 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
}
/* Clamp values > 1.0. */
- while (i++ < 35)
+ while (i++ < glk_degamma_lut_size(dev_priv))
intel_de_write_fw(dev_priv, PRE_CSC_GAMC_DATA(pipe), 1 << 16);
intel_de_write_fw(dev_priv, PRE_CSC_GAMC_INDEX(pipe), 0);
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [Intel-gfx] [v3 3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform config
2021-12-07 7:11 [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform Uma Shankar
2021-12-07 7:11 ` [Intel-gfx] [v3 1/3] drm/i915/xelpd: Enable Pipe color support for " Uma Shankar
2021-12-07 7:11 ` [Intel-gfx] [v3 2/3] drm/i915/xelpd: Enable Pipe Degamma Uma Shankar
@ 2021-12-07 7:11 ` Uma Shankar
2021-12-07 7:25 ` [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform Shankar, Uma
2021-12-07 10:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable pipe color support on D13 platform (rev3) Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Uma Shankar @ 2021-12-07 7:11 UTC (permalink / raw)
To: intel-gfx
XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
extended range. It has 511 entries for gamma with additional 2 entries
for extended range.
v2: Updated lut size for 10bit gamma, added lut_tests (Ville)
v3: Dropped the gamma lut tests fields (Ville)
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0ba516838b02..6aaa7c644c9b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -938,7 +938,10 @@ static const struct intel_device_info adl_s_info = {
#define XE_LPD_FEATURES \
.abox_mask = GENMASK(1, 0), \
- .color = { .degamma_lut_size = 0, .gamma_lut_size = 0 }, \
+ .color = { .degamma_lut_size = 128, .gamma_lut_size = 1024, \
+ .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
+ DRM_COLOR_LUT_EQUAL_CHANNELS, \
+ }, \
.dbuf.size = 4096, \
.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
BIT(DBUF_S4), \
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform
2021-12-07 7:11 [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform Uma Shankar
` (2 preceding siblings ...)
2021-12-07 7:11 ` [Intel-gfx] [v3 3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform config Uma Shankar
@ 2021-12-07 7:25 ` Shankar, Uma
2021-12-07 10:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable pipe color support on D13 platform (rev3) Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Shankar, Uma @ 2021-12-07 7:25 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Shankar, Uma <uma.shankar@intel.com>
> Sent: Tuesday, December 7, 2021 12:42 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: ville.syrjala@linux.intel.com; Modem, Bhanuprakash
> <bhanuprakash.modem@intel.com>; Shankar, Uma <uma.shankar@intel.com>
> Subject: [v3 0/3] Enable pipe color support on D13 platform
>
> Enable pipe color support for Display 13 platform. This series enables just the 10bit
> gamma mode. More advanced logarithmic gamma mode will be enable with the new
> enhanced UAPI. It will be extended once the UAPI is agreed in community. This series
> just adds the basic support in the interim.
>
> v2: Addressed Ville's review comments.
>
> v3: Dropped gamma lut tests field (Ville)
Pushed the changes to drm-intel-next. Thanks for the reviews.
Regards,
Uma Shankar
> Uma Shankar (3):
> drm/i915/xelpd: Enable Pipe color support for D13 platform
> drm/i915/xelpd: Enable Pipe Degamma
> drm/i915/xelpd: Add Pipe Color Lut caps to platform config
>
> drivers/gpu/drm/i915/display/intel_color.c | 23 +++++++++++++++++++---
> drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
> 2 files changed, 24 insertions(+), 4 deletions(-)
>
> --
> 2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable pipe color support on D13 platform (rev3)
2021-12-07 7:11 [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform Uma Shankar
` (3 preceding siblings ...)
2021-12-07 7:25 ` [Intel-gfx] [v3 0/3] Enable pipe color support on D13 platform Shankar, Uma
@ 2021-12-07 10:29 ` Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-12-07 10:29 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 932 bytes --]
== Series Details ==
Series: Enable pipe color support on D13 platform (rev3)
URL : https://patchwork.freedesktop.org/series/97219/
State : failure
== Summary ==
Applying: drm/i915/xelpd: Enable Pipe color support for D13 platform
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/display/intel_color.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/display/intel_color.c
No changes -- Patch already applied.
Applying: drm/i915/xelpd: Enable Pipe Degamma
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/display/intel_color.c
Falling back to patching base and 3-way merge...
No changes -- Patch already applied.
Applying: drm/i915/xelpd: Add Pipe Color Lut caps to platform config
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/i915_pci.c
Falling back to patching base and 3-way merge...
No changes -- Patch already applied.
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^ permalink raw reply [flat|nested] 6+ messages in thread