[Intel-gfx] [PATCH 0/2] Use drm_clflush* instead of clflush

[Intel-gfx] [PATCH 0/2] Use drm_clflush* instead of clflush

[Michael Cheng]

This patch series re-work a few i915 functions to use drm_clflush_virt_range
instead of calling clflush directly. This will prevent errors when building
for non-x86 architectures.


Michael Cheng (2):
  drm/i915/gt: Re-work intel_write_status_page
  drm/i915/gt: Re-work invalidate_csb_entries

 drivers/gpu/drm/i915/gt/intel_engine.h              | 13 ++++---------
 .../gpu/drm/i915/gt/intel_execlists_submission.c    |  4 ++--
 2 files changed, 6 insertions(+), 11 deletions(-)

-- 
2.25.1

[Intel-gfx] [PATCH 1/2] drm/i915/gt: Re-work intel_write_status_page

[Michael Cheng]

Re-work intel_write_status_page to use drm_clflush_virt_range. This
will prevent compiler errors when building for non-x86 architectures.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine.h | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
index 08559ace0ada..e6189fffa7a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -4,6 +4,7 @@
 
 #include <asm/cacheflush.h>
 #include <drm/drm_util.h>
+#include <drm/drm_cache.h>
 
 #include <linux/hashtable.h>
 #include <linux/irq_work.h>
@@ -144,15 +145,9 @@ intel_write_status_page(struct intel_engine_cs *engine, int reg, u32 value)
 	 * of extra paranoia to try and ensure that the HWS takes the value
 	 * we give and that it doesn't end up trapped inside the CPU!
 	 */
-	if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
-		mb();
-		clflush(&engine->status_page.addr[reg]);
-		engine->status_page.addr[reg] = value;
-		clflush(&engine->status_page.addr[reg]);
-		mb();
-	} else {
-		WRITE_ONCE(engine->status_page.addr[reg], value);
-	}
+	drm_clflush_virt_range(&engine->status_page.addr[reg], PAGE_SIZE);
+	WRITE_ONCE(engine->status_page.addr[reg], value);
+	drm_clflush_virt_range(&engine->status_page.addr[reg], PAGE_SIZE);
 }
 
 /*
-- 
2.25.1

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Re-work intel_write_status_page

[Matthew Auld]

On Thu, 27 Jan 2022 at 23:41, Michael Cheng <michael.cheng@intel.com> wrote:
>
> Re-work intel_write_status_page to use drm_clflush_virt_range. This
> will prevent compiler errors when building for non-x86 architectures.
>
> Signed-off-by: Michael Cheng <michael.cheng@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_engine.h | 13 ++++---------
>  1 file changed, 4 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
> index 08559ace0ada..e6189fffa7a3 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine.h
> @@ -4,6 +4,7 @@
>
>  #include <asm/cacheflush.h>
>  #include <drm/drm_util.h>
> +#include <drm/drm_cache.h>
>
>  #include <linux/hashtable.h>
>  #include <linux/irq_work.h>
> @@ -144,15 +145,9 @@ intel_write_status_page(struct intel_engine_cs *engine, int reg, u32 value)
>          * of extra paranoia to try and ensure that the HWS takes the value
>          * we give and that it doesn't end up trapped inside the CPU!
>          */
> -       if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
> -               mb();
> -               clflush(&engine->status_page.addr[reg]);
> -               engine->status_page.addr[reg] = value;
> -               clflush(&engine->status_page.addr[reg]);
> -               mb();
> -       } else {
> -               WRITE_ONCE(engine->status_page.addr[reg], value);
> -       }
> +       drm_clflush_virt_range(&engine->status_page.addr[reg], PAGE_SIZE);
> +       WRITE_ONCE(engine->status_page.addr[reg], value);
> +       drm_clflush_virt_range(&engine->status_page.addr[reg], PAGE_SIZE);

s/PAGE_SIZE/sizeof(value) ?

>  }
>
>  /*

> --
> 2.25.1
>

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Re-work intel_write_status_page

[Bowman, Casey G]

> -----Original Message-----
> From: Cheng, Michael <michael.cheng@intel.com>
> Sent: Thursday, January 27, 2022 3:41 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Cheng, Michael <michael.cheng@intel.com>; Bowman, Casey G
> <casey.g.bowman@intel.com>; De Marchi, Lucas
> <lucas.demarchi@intel.com>; Boyer, Wayne <wayne.boyer@intel.com>;
> ville.syrjala@linux.intel.com; Kuoppala, Mika <mika.kuoppala@intel.com>;
> chris@chris-wilson.co.uk
> Subject: [PATCH 1/2] drm/i915/gt: Re-work intel_write_status_page
> 
> Re-work intel_write_status_page to use drm_clflush_virt_range. This will
> prevent compiler errors when building for non-x86 architectures.
> 
> Signed-off-by: Michael Cheng <michael.cheng@intel.com>

Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_engine.h | 13 ++++---------
>  1 file changed, 4 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
> b/drivers/gpu/drm/i915/gt/intel_engine.h
> index 08559ace0ada..e6189fffa7a3 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine.h
> @@ -4,6 +4,7 @@
> 
>  #include <asm/cacheflush.h>
>  #include <drm/drm_util.h>
> +#include <drm/drm_cache.h>
> 
>  #include <linux/hashtable.h>
>  #include <linux/irq_work.h>
> @@ -144,15 +145,9 @@ intel_write_status_page(struct intel_engine_cs
> *engine, int reg, u32 value)
>  	 * of extra paranoia to try and ensure that the HWS takes the value
>  	 * we give and that it doesn't end up trapped inside the CPU!
>  	 */
> -	if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
> -		mb();
> -		clflush(&engine->status_page.addr[reg]);
> -		engine->status_page.addr[reg] = value;
> -		clflush(&engine->status_page.addr[reg]);
> -		mb();
> -	} else {
> -		WRITE_ONCE(engine->status_page.addr[reg], value);
> -	}
> +	drm_clflush_virt_range(&engine->status_page.addr[reg],
> PAGE_SIZE);
> +	WRITE_ONCE(engine->status_page.addr[reg], value);
> +	drm_clflush_virt_range(&engine->status_page.addr[reg],
> PAGE_SIZE);
>  }
> 
>  /*
> --
> 2.25.1

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Re-work invalidate_csb_entries

[Michael Cheng]

Re-work invalidate_csb_entries to use drm_clflush_virt_range. This will
prevent compiler errors when building for non-x86 architectures.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 960a9aaf4f3a..90b5daf9433d 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1647,8 +1647,8 @@ cancel_port_requests(struct intel_engine_execlists * const execlists,
 
 static void invalidate_csb_entries(const u64 *first, const u64 *last)
 {
-	clflush((void *)first);
-	clflush((void *)last);
+	drm_clflush_virt_range((void *)first, sizeof(*first));
+	drm_clflush_virt_range((void *)last, sizeof(*last));
 }
 
 /*
-- 
2.25.1

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Re-work invalidate_csb_entries

[Matthew Auld]

On Thu, 27 Jan 2022 at 23:41, Michael Cheng <michael.cheng@intel.com> wrote:
>
> Re-work invalidate_csb_entries to use drm_clflush_virt_range. This will
> prevent compiler errors when building for non-x86 architectures.
>
> Signed-off-by: Michael Cheng <michael.cheng@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 960a9aaf4f3a..90b5daf9433d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -1647,8 +1647,8 @@ cancel_port_requests(struct intel_engine_execlists * const execlists,
>
>  static void invalidate_csb_entries(const u64 *first, const u64 *last)
>  {
> -       clflush((void *)first);
> -       clflush((void *)last);
> +       drm_clflush_virt_range((void *)first, sizeof(*first));
> +       drm_clflush_virt_range((void *)last, sizeof(*last));

Could maybe drop the (void *) casting,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

>  }
>
>  /*
> --
> 2.25.1
>

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Use drm_clflush* instead of clflush

[Patchwork]

== Series Details ==

Series: Use drm_clflush* instead of clflush
URL   : https://patchwork.freedesktop.org/series/99450/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for Use drm_clflush* instead of clflush

[Patchwork]

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== Series Details ==

Series: Use drm_clflush* instead of clflush
URL   : https://patchwork.freedesktop.org/series/99450/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11154 -> Patchwork_22132
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_22132 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22132, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/index.html

Participating hosts (43 -> 41)
------------------------------

  Additional (1): fi-pnv-d510 
  Missing    (3): fi-bsw-cyan fi-icl-u2 fi-bdw-samus 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_22132:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gt_mocs:
    - bat-dg1-6:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11154/bat-dg1-6/igt@i915_selftest@live@gt_mocs.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/bat-dg1-6/igt@i915_selftest@live@gt_mocs.html

  
Known issues
------------

  Here are the changes found in Patchwork_22132 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-snb-2600:        NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html

  * igt@amdgpu/amd_cs_nop@sync-fork-gfx0:
    - fi-skl-6600u:       NOTRUN -> [SKIP][4] ([fdo#109271]) +17 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/fi-skl-6600u/igt@amdgpu/amd_cs_nop@sync-fork-gfx0.html

  * igt@i915_selftest@live@hangcheck:
    - bat-dg1-5:          [PASS][5] -> [DMESG-FAIL][6] ([i915#4494] / [i915#4957])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11154/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
    - fi-hsw-4770:        [PASS][7] -> [INCOMPLETE][8] ([i915#4785])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11154/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@prime_vgem@basic-userptr:
    - fi-pnv-d510:        NOTRUN -> [SKIP][9] ([fdo#109271]) +57 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/fi-pnv-d510/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-hsw-4770:        NOTRUN -> [FAIL][10] ([fdo#109271] / [i915#1436] / [i915#4312])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/fi-hsw-4770/igt@runner@aborted.html
    - bat-dg1-6:          NOTRUN -> [FAIL][11] ([i915#4312])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/bat-dg1-6/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - fi-snb-2600:        [INCOMPLETE][12] ([i915#3921]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11154/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957


Build changes
-------------

  * Linux: CI_DRM_11154 -> Patchwork_22132

  CI-20190529: 20190529
  CI_DRM_11154: 401e42aa274384a2660ad4b54af9ef6a86429cb1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6336: ae2eb9e18bc58a4c45f28cfd80962938198dec3c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_22132: 83fa55f11e7b79ce579f3f23dbf7c9bf14655bcc @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

83fa55f11e7b drm/i915/gt: Re-work invalidate_csb_entries
926d9e54027d drm/i915/gt: Re-work intel_write_status_page

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22132/index.html

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