* [Intel-gfx] [PATCH 0/4] DGFX OpRegion
@ 2022-02-06 14:43 Anshuman Gupta
2022-02-06 14:43 ` [Intel-gfx] [PATCH 1/4] drm/i915/opregion: Abstract opregion function Anshuman Gupta
` (7 more replies)
0 siblings, 8 replies; 11+ messages in thread
From: Anshuman Gupta @ 2022-02-06 14:43 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi
This series setup DGFX OpRegion.
Anshuman Gupta (4):
drm/i915/opregion: Abstract opregion function
drm/i915/opregion: Register opreg func only for disp parts
drm/i915/dgfx: OPROM OpRegion Setup
drm/i915/dgfx: Get VBT from rvda
drivers/gpu/drm/i915/display/intel_opregion.c | 533 ++++++++++++++++--
drivers/gpu/drm/i915/display/intel_opregion.h | 9 +-
drivers/gpu/drm/i915/i915_driver.c | 2 +-
3 files changed, 492 insertions(+), 52 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [Intel-gfx] [PATCH 1/4] drm/i915/opregion: Abstract opregion function 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta @ 2022-02-06 14:43 ` Anshuman Gupta 2022-02-07 10:59 ` Jani Nikula 2022-02-06 14:43 ` [Intel-gfx] [PATCH 2/4] drm/i915/opregion: Register opreg func only for disp parts Anshuman Gupta ` (6 subsequent siblings) 7 siblings, 1 reply; 11+ messages in thread From: Anshuman Gupta @ 2022-02-06 14:43 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula, lucas.demarchi Abstract opregion operations like get opregion base, get rvda and opregion cleanup in form of i915_opregion_ops. This will be required to converge igfx and dgfx opregion. This keeps intel_opregion_setup() as static function, and adds a new function intel_opregion_init(). Cc: Jani Nikula <jani.nikula@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Badal Nilawar <badal.nilawar@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_opregion.c | 215 ++++++++++++++---- drivers/gpu/drm/i915/display/intel_opregion.h | 8 +- drivers/gpu/drm/i915/i915_driver.c | 2 +- 3 files changed, 172 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index af9d30f56cc1..19f0558c0fbf 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -137,6 +137,13 @@ struct opregion_asle_ext { u8 rsvd[764]; } __packed; +struct i915_opregion_func { + void *(*alloc_opregion)(struct drm_i915_private *i915); + void *(*alloc_rvda)(struct drm_i915_private *i915); + void (*free_rvda)(struct drm_i915_private *i915); + void (*free_opregion)(struct drm_i915_private *i915); +}; + /* Driver readiness indicator */ #define ASLE_ARDY_READY (1 << 0) #define ASLE_ARDY_NOT_READY (0 << 0) @@ -839,13 +846,10 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) return ret; } -int intel_opregion_setup(struct drm_i915_private *dev_priv) +static int intel_opregion_setup(struct drm_i915_private *dev_priv) { struct intel_opregion *opregion = &dev_priv->opregion; - struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); - u32 asls, mboxes; - char buf[sizeof(OPREGION_SIGNATURE)]; - int err = 0; + u32 mboxes; void *base; const void *vbt; u32 vbt_size; @@ -856,27 +860,12 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100); BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400); - pci_read_config_dword(pdev, ASLS, &asls); - drm_dbg(&dev_priv->drm, "graphic opregion physical addr: 0x%x\n", - asls); - if (asls == 0) { - drm_dbg(&dev_priv->drm, "ACPI OpRegion not supported!\n"); - return -ENOTSUPP; - } - INIT_WORK(&opregion->asle_work, asle_work); - base = memremap(asls, OPREGION_SIZE, MEMREMAP_WB); - if (!base) - return -ENOMEM; + base = opregion->opregion_func->alloc_opregion(dev_priv); + if (IS_ERR(base)) + return PTR_ERR(base); - memcpy(buf, base, sizeof(buf)); - - if (memcmp(buf, OPREGION_SIGNATURE, 16)) { - drm_dbg(&dev_priv->drm, "opregion signature mismatch\n"); - err = -EINVAL; - goto err_out; - } opregion->header = base; opregion->lid_state = base + ACPI_CLID; @@ -924,23 +913,8 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) if (opregion->header->over.major >= 2 && opregion->asle && opregion->asle->rvda && opregion->asle->rvds) { - resource_size_t rvda = opregion->asle->rvda; - - /* - * opregion 2.0: rvda is the physical VBT address. - * - * opregion 2.1+: rvda is unsigned, relative offset from - * opregion base, and should never point within opregion. - */ - if (opregion->header->over.major > 2 || - opregion->header->over.minor >= 1) { - drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE); - - rvda += asls; - } - opregion->rvda = memremap(rvda, opregion->asle->rvds, - MEMREMAP_WB); + opregion->rvda = opregion->opregion_func->alloc_rvda(dev_priv); vbt = opregion->rvda; vbt_size = opregion->asle->rvds; @@ -953,8 +927,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) } else { drm_dbg_kms(&dev_priv->drm, "Invalid VBT in ACPI OpRegion (RVDA)\n"); - memunmap(opregion->rvda); - opregion->rvda = NULL; + opregion->opregion_func->free_rvda(dev_priv); } } @@ -982,9 +955,6 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) out: return 0; -err_out: - memunmap(base); - return err; } static int intel_use_opregion_panel_type_callback(const struct dmi_system_id *id) @@ -1169,11 +1139,9 @@ void intel_opregion_unregister(struct drm_i915_private *i915) } /* just clear all opregion memory pointers now */ - memunmap(opregion->header); - if (opregion->rvda) { - memunmap(opregion->rvda); - opregion->rvda = NULL; - } + opregion->opregion_func->free_rvda(i915); + opregion->opregion_func->free_opregion(i915); + if (opregion->vbt_firmware) { kfree(opregion->vbt_firmware); opregion->vbt_firmware = NULL; @@ -1186,3 +1154,152 @@ void intel_opregion_unregister(struct drm_i915_private *i915) opregion->vbt = NULL; opregion->lid_state = NULL; } + +static int +intel_opregion_get_asls(struct drm_i915_private *i915) +{ + struct intel_opregion *opregion = &i915->opregion; + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); + u32 asls; + + pci_read_config_dword(pdev, ASLS, &asls); + drm_dbg(&i915->drm, "graphic opregion physical addr: 0x%x\n", + asls); + if (asls == 0) { + drm_dbg(&i915->drm, "ACPI OpRegion not supported!\n"); + return -EINVAL; + } + + opregion->asls = asls; + + return 0; +} + +static void *intel_igfx_alloc_opregion(struct drm_i915_private *i915) +{ + struct intel_opregion *opregion = &i915->opregion; + char buf[sizeof(OPREGION_SIGNATURE)]; + int err = 0; + void *base; + + err = intel_opregion_get_asls(i915); + if (err) + return ERR_PTR(err); + + base = memremap(opregion->asls, OPREGION_SIZE, MEMREMAP_WB); + if (!base) + return ERR_PTR(-ENOMEM); + + memcpy(buf, base, sizeof(buf)); + + if (memcmp(buf, OPREGION_SIGNATURE, 16)) { + drm_dbg(&i915->drm, "opregion signature mismatch\n"); + err = -EINVAL; + goto err_out; + } + + return base; + +err_out: + memunmap(base); + + return ERR_PTR(err); +} + +static void *intel_igfx_alloc_rvda(struct drm_i915_private *i915) +{ + struct intel_opregion *opregion = &i915->opregion; + resource_size_t rvda; + void *opreg_rvda; + + drm_WARN_ON(&i915->drm, !opregion->asls || !opregion->header); + + rvda = opregion->asle->rvda; + + /* + * opregion 2.0: rvda is the physical VBT address. + * + * opregion 2.1+: rvda is unsigned, relative offset from + * opregion base, and should never point within opregion. + */ + if (opregion->header->over.major > 2 || + opregion->header->over.minor >= 1) { + drm_WARN_ON(&i915->drm, rvda < OPREGION_SIZE); + + rvda += opregion->asls; + } + + opreg_rvda = memremap(rvda, opregion->asle->rvds, MEMREMAP_WB); + if (!opreg_rvda) + return ERR_PTR(-ENOMEM); + + return opreg_rvda; +} + +static void intel_igfx_free_rvda(struct drm_i915_private *i915) +{ + struct intel_opregion *opregion = &i915->opregion; + + if (opregion->rvda) { + memunmap(opregion->rvda); + opregion->rvda = NULL; + } +} + +static void intel_igfx_free_opregion(struct drm_i915_private *i915) +{ + struct intel_opregion *opregion = &i915->opregion; + + if (opregion->header) + memunmap(opregion->header); +} + +static void *intel_dgfx_alloc_opregion(struct drm_i915_private *i915) +{ + return ERR_PTR(-EOPNOTSUPP); +} + +static void *intel_dgfx_alloc_rvda(struct drm_i915_private *i915) +{ + return ERR_PTR(-EOPNOTSUPP); +} + +static void intel_dgfx_free_rvda(struct drm_i915_private *i915) +{ +} + +static void intel_dgfx_free_opregion(struct drm_i915_private *i915) +{ +} + +static const struct i915_opregion_func igfx_opregion_func = { + .alloc_opregion = intel_igfx_alloc_opregion, + .alloc_rvda = intel_igfx_alloc_rvda, + .free_rvda = intel_igfx_free_rvda, + .free_opregion = intel_igfx_free_opregion, +}; + +static const struct i915_opregion_func dgfx_opregion_func = { + .alloc_opregion = intel_dgfx_alloc_opregion, + .alloc_rvda = intel_dgfx_alloc_rvda, + .free_rvda = intel_dgfx_free_rvda, + .free_opregion = intel_dgfx_free_opregion, +}; + +/** + * intel_opregion_init() - Init ACPI opregion. + * @i915 i915 device priv data. + * It initialize the dgfx/igfx opregion function pointers + * and setup the ACPI opregions. + */ +int intel_opregion_init(struct drm_i915_private *i915) +{ + struct intel_opregion *opregion = &i915->opregion; + + if (IS_DGFX(i915)) + opregion->opregion_func = &dgfx_opregion_func; + else + opregion->opregion_func = &igfx_opregion_func; + + return intel_opregion_setup(i915); +} diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h index 82cc0ba34af7..4ff48c445044 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.h +++ b/drivers/gpu/drm/i915/display/intel_opregion.h @@ -37,6 +37,7 @@ struct opregion_acpi; struct opregion_swsci; struct opregion_asle; struct opregion_asle_ext; +struct i915_opregion_func; struct intel_opregion { struct opregion_header *header; @@ -46,6 +47,8 @@ struct intel_opregion { u32 swsci_sbcb_sub_functions; struct opregion_asle *asle; struct opregion_asle_ext *asle_ext; + const struct i915_opregion_func *opregion_func; + resource_size_t asls; void *rvda; void *vbt_firmware; const void *vbt; @@ -59,8 +62,7 @@ struct intel_opregion { #ifdef CONFIG_ACPI -int intel_opregion_setup(struct drm_i915_private *dev_priv); - +int intel_opregion_init(struct drm_i915_private *i915); void intel_opregion_register(struct drm_i915_private *dev_priv); void intel_opregion_unregister(struct drm_i915_private *dev_priv); @@ -78,7 +80,7 @@ struct edid *intel_opregion_get_edid(struct intel_connector *connector); #else /* CONFIG_ACPI*/ -static inline int intel_opregion_setup(struct drm_i915_private *dev_priv) +static inline int intel_opregion_init(struct drm_i915_private *i915) { return 0; } diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 3d41f532a5d6..f7cb34f5fa4a 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -634,7 +634,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) if (ret) goto err_msi; - intel_opregion_setup(dev_priv); + intel_opregion_init(dev_priv); ret = intel_pcode_init(dev_priv); if (ret) -- 2.26.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 1/4] drm/i915/opregion: Abstract opregion function 2022-02-06 14:43 ` [Intel-gfx] [PATCH 1/4] drm/i915/opregion: Abstract opregion function Anshuman Gupta @ 2022-02-07 10:59 ` Jani Nikula 0 siblings, 0 replies; 11+ messages in thread From: Jani Nikula @ 2022-02-07 10:59 UTC (permalink / raw) To: Anshuman Gupta, intel-gfx; +Cc: lucas.demarchi On Sun, 06 Feb 2022, Anshuman Gupta <anshuman.gupta@intel.com> wrote: > Abstract opregion operations like get opregion base, get rvda and > opregion cleanup in form of i915_opregion_ops. > This will be required to converge igfx and dgfx opregion. > This keeps intel_opregion_setup() as static function, and adds > a new function intel_opregion_init(). Too many things at once. If it's a function pointer abstraction, don't make *any* functional changes at the same time, i.e. first let the dgfx and igfx paths be the same like they are now. Don't add a separate dgfx check. It's *much* easier to review this if there are no functional changes, and it's easier to review the follow-up when that adds the functional changes for dgfx. BR, Jani. > > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Badal Nilawar <badal.nilawar@intel.com> > Cc: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> > --- > drivers/gpu/drm/i915/display/intel_opregion.c | 215 ++++++++++++++---- > drivers/gpu/drm/i915/display/intel_opregion.h | 8 +- > drivers/gpu/drm/i915/i915_driver.c | 2 +- > 3 files changed, 172 insertions(+), 53 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c > index af9d30f56cc1..19f0558c0fbf 100644 > --- a/drivers/gpu/drm/i915/display/intel_opregion.c > +++ b/drivers/gpu/drm/i915/display/intel_opregion.c > @@ -137,6 +137,13 @@ struct opregion_asle_ext { > u8 rsvd[764]; > } __packed; > > +struct i915_opregion_func { > + void *(*alloc_opregion)(struct drm_i915_private *i915); > + void *(*alloc_rvda)(struct drm_i915_private *i915); > + void (*free_rvda)(struct drm_i915_private *i915); > + void (*free_opregion)(struct drm_i915_private *i915); > +}; > + > /* Driver readiness indicator */ > #define ASLE_ARDY_READY (1 << 0) > #define ASLE_ARDY_NOT_READY (0 << 0) > @@ -839,13 +846,10 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) > return ret; > } > > -int intel_opregion_setup(struct drm_i915_private *dev_priv) > +static int intel_opregion_setup(struct drm_i915_private *dev_priv) > { > struct intel_opregion *opregion = &dev_priv->opregion; > - struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); > - u32 asls, mboxes; > - char buf[sizeof(OPREGION_SIGNATURE)]; > - int err = 0; > + u32 mboxes; > void *base; > const void *vbt; > u32 vbt_size; > @@ -856,27 +860,12 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) > BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100); > BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400); > > - pci_read_config_dword(pdev, ASLS, &asls); > - drm_dbg(&dev_priv->drm, "graphic opregion physical addr: 0x%x\n", > - asls); > - if (asls == 0) { > - drm_dbg(&dev_priv->drm, "ACPI OpRegion not supported!\n"); > - return -ENOTSUPP; > - } > - > INIT_WORK(&opregion->asle_work, asle_work); > > - base = memremap(asls, OPREGION_SIZE, MEMREMAP_WB); > - if (!base) > - return -ENOMEM; > + base = opregion->opregion_func->alloc_opregion(dev_priv); > + if (IS_ERR(base)) > + return PTR_ERR(base); > > - memcpy(buf, base, sizeof(buf)); > - > - if (memcmp(buf, OPREGION_SIGNATURE, 16)) { > - drm_dbg(&dev_priv->drm, "opregion signature mismatch\n"); > - err = -EINVAL; > - goto err_out; > - } > opregion->header = base; > opregion->lid_state = base + ACPI_CLID; > > @@ -924,23 +913,8 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) > > if (opregion->header->over.major >= 2 && opregion->asle && > opregion->asle->rvda && opregion->asle->rvds) { > - resource_size_t rvda = opregion->asle->rvda; > - > - /* > - * opregion 2.0: rvda is the physical VBT address. > - * > - * opregion 2.1+: rvda is unsigned, relative offset from > - * opregion base, and should never point within opregion. > - */ > - if (opregion->header->over.major > 2 || > - opregion->header->over.minor >= 1) { > - drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE); > - > - rvda += asls; > - } > > - opregion->rvda = memremap(rvda, opregion->asle->rvds, > - MEMREMAP_WB); > + opregion->rvda = opregion->opregion_func->alloc_rvda(dev_priv); > > vbt = opregion->rvda; > vbt_size = opregion->asle->rvds; > @@ -953,8 +927,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) > } else { > drm_dbg_kms(&dev_priv->drm, > "Invalid VBT in ACPI OpRegion (RVDA)\n"); > - memunmap(opregion->rvda); > - opregion->rvda = NULL; > + opregion->opregion_func->free_rvda(dev_priv); > } > } > > @@ -982,9 +955,6 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) > out: > return 0; > > -err_out: > - memunmap(base); > - return err; > } > > static int intel_use_opregion_panel_type_callback(const struct dmi_system_id *id) > @@ -1169,11 +1139,9 @@ void intel_opregion_unregister(struct drm_i915_private *i915) > } > > /* just clear all opregion memory pointers now */ > - memunmap(opregion->header); > - if (opregion->rvda) { > - memunmap(opregion->rvda); > - opregion->rvda = NULL; > - } > + opregion->opregion_func->free_rvda(i915); > + opregion->opregion_func->free_opregion(i915); > + > if (opregion->vbt_firmware) { > kfree(opregion->vbt_firmware); > opregion->vbt_firmware = NULL; > @@ -1186,3 +1154,152 @@ void intel_opregion_unregister(struct drm_i915_private *i915) > opregion->vbt = NULL; > opregion->lid_state = NULL; > } > + > +static int > +intel_opregion_get_asls(struct drm_i915_private *i915) > +{ > + struct intel_opregion *opregion = &i915->opregion; > + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); > + u32 asls; > + > + pci_read_config_dword(pdev, ASLS, &asls); > + drm_dbg(&i915->drm, "graphic opregion physical addr: 0x%x\n", > + asls); > + if (asls == 0) { > + drm_dbg(&i915->drm, "ACPI OpRegion not supported!\n"); > + return -EINVAL; > + } > + > + opregion->asls = asls; > + > + return 0; > +} > + > +static void *intel_igfx_alloc_opregion(struct drm_i915_private *i915) > +{ > + struct intel_opregion *opregion = &i915->opregion; > + char buf[sizeof(OPREGION_SIGNATURE)]; > + int err = 0; > + void *base; > + > + err = intel_opregion_get_asls(i915); > + if (err) > + return ERR_PTR(err); > + > + base = memremap(opregion->asls, OPREGION_SIZE, MEMREMAP_WB); > + if (!base) > + return ERR_PTR(-ENOMEM); > + > + memcpy(buf, base, sizeof(buf)); > + > + if (memcmp(buf, OPREGION_SIGNATURE, 16)) { > + drm_dbg(&i915->drm, "opregion signature mismatch\n"); > + err = -EINVAL; > + goto err_out; > + } > + > + return base; > + > +err_out: > + memunmap(base); > + > + return ERR_PTR(err); > +} > + > +static void *intel_igfx_alloc_rvda(struct drm_i915_private *i915) > +{ > + struct intel_opregion *opregion = &i915->opregion; > + resource_size_t rvda; > + void *opreg_rvda; > + > + drm_WARN_ON(&i915->drm, !opregion->asls || !opregion->header); > + > + rvda = opregion->asle->rvda; > + > + /* > + * opregion 2.0: rvda is the physical VBT address. > + * > + * opregion 2.1+: rvda is unsigned, relative offset from > + * opregion base, and should never point within opregion. > + */ > + if (opregion->header->over.major > 2 || > + opregion->header->over.minor >= 1) { > + drm_WARN_ON(&i915->drm, rvda < OPREGION_SIZE); > + > + rvda += opregion->asls; > + } > + > + opreg_rvda = memremap(rvda, opregion->asle->rvds, MEMREMAP_WB); > + if (!opreg_rvda) > + return ERR_PTR(-ENOMEM); > + > + return opreg_rvda; > +} > + > +static void intel_igfx_free_rvda(struct drm_i915_private *i915) > +{ > + struct intel_opregion *opregion = &i915->opregion; > + > + if (opregion->rvda) { > + memunmap(opregion->rvda); > + opregion->rvda = NULL; > + } > +} > + > +static void intel_igfx_free_opregion(struct drm_i915_private *i915) > +{ > + struct intel_opregion *opregion = &i915->opregion; > + > + if (opregion->header) > + memunmap(opregion->header); > +} > + > +static void *intel_dgfx_alloc_opregion(struct drm_i915_private *i915) > +{ > + return ERR_PTR(-EOPNOTSUPP); > +} > + > +static void *intel_dgfx_alloc_rvda(struct drm_i915_private *i915) > +{ > + return ERR_PTR(-EOPNOTSUPP); > +} > + > +static void intel_dgfx_free_rvda(struct drm_i915_private *i915) > +{ > +} > + > +static void intel_dgfx_free_opregion(struct drm_i915_private *i915) > +{ > +} > + > +static const struct i915_opregion_func igfx_opregion_func = { > + .alloc_opregion = intel_igfx_alloc_opregion, > + .alloc_rvda = intel_igfx_alloc_rvda, > + .free_rvda = intel_igfx_free_rvda, > + .free_opregion = intel_igfx_free_opregion, > +}; > + > +static const struct i915_opregion_func dgfx_opregion_func = { > + .alloc_opregion = intel_dgfx_alloc_opregion, > + .alloc_rvda = intel_dgfx_alloc_rvda, > + .free_rvda = intel_dgfx_free_rvda, > + .free_opregion = intel_dgfx_free_opregion, > +}; > + > +/** > + * intel_opregion_init() - Init ACPI opregion. > + * @i915 i915 device priv data. > + * It initialize the dgfx/igfx opregion function pointers > + * and setup the ACPI opregions. > + */ > +int intel_opregion_init(struct drm_i915_private *i915) > +{ > + struct intel_opregion *opregion = &i915->opregion; > + > + if (IS_DGFX(i915)) > + opregion->opregion_func = &dgfx_opregion_func; > + else > + opregion->opregion_func = &igfx_opregion_func; > + > + return intel_opregion_setup(i915); > +} > diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h > index 82cc0ba34af7..4ff48c445044 100644 > --- a/drivers/gpu/drm/i915/display/intel_opregion.h > +++ b/drivers/gpu/drm/i915/display/intel_opregion.h > @@ -37,6 +37,7 @@ struct opregion_acpi; > struct opregion_swsci; > struct opregion_asle; > struct opregion_asle_ext; > +struct i915_opregion_func; > > struct intel_opregion { > struct opregion_header *header; > @@ -46,6 +47,8 @@ struct intel_opregion { > u32 swsci_sbcb_sub_functions; > struct opregion_asle *asle; > struct opregion_asle_ext *asle_ext; > + const struct i915_opregion_func *opregion_func; > + resource_size_t asls; > void *rvda; > void *vbt_firmware; > const void *vbt; > @@ -59,8 +62,7 @@ struct intel_opregion { > > #ifdef CONFIG_ACPI > > -int intel_opregion_setup(struct drm_i915_private *dev_priv); > - > +int intel_opregion_init(struct drm_i915_private *i915); > void intel_opregion_register(struct drm_i915_private *dev_priv); > void intel_opregion_unregister(struct drm_i915_private *dev_priv); > > @@ -78,7 +80,7 @@ struct edid *intel_opregion_get_edid(struct intel_connector *connector); > > #else /* CONFIG_ACPI*/ > > -static inline int intel_opregion_setup(struct drm_i915_private *dev_priv) > +static inline int intel_opregion_init(struct drm_i915_private *i915) > { > return 0; > } > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c > index 3d41f532a5d6..f7cb34f5fa4a 100644 > --- a/drivers/gpu/drm/i915/i915_driver.c > +++ b/drivers/gpu/drm/i915/i915_driver.c > @@ -634,7 +634,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) > if (ret) > goto err_msi; > > - intel_opregion_setup(dev_priv); > + intel_opregion_init(dev_priv); > > ret = intel_pcode_init(dev_priv); > if (ret) -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH 2/4] drm/i915/opregion: Register opreg func only for disp parts 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta 2022-02-06 14:43 ` [Intel-gfx] [PATCH 1/4] drm/i915/opregion: Abstract opregion function Anshuman Gupta @ 2022-02-06 14:43 ` Anshuman Gupta 2022-02-07 11:02 ` Jani Nikula 2022-02-06 14:43 ` [Intel-gfx] [PATCH 3/4] drm/i915/dgfx: OPROM OpRegion Setup Anshuman Gupta ` (5 subsequent siblings) 7 siblings, 1 reply; 11+ messages in thread From: Anshuman Gupta @ 2022-02-06 14:43 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula, lucas.demarchi It need to register opregion_func only for graphics sku which has display. Use HAS_DISPLAY() to register opregion_func. Cc: Badal Nilawar <badal.nilawar@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_opregion.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index 19f0558c0fbf..c1b558cdb99e 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -860,6 +860,9 @@ static int intel_opregion_setup(struct drm_i915_private *dev_priv) BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100); BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400); + if (!opregion->opregion_func) + return 0; + INIT_WORK(&opregion->asle_work, asle_work); base = opregion->opregion_func->alloc_opregion(dev_priv); @@ -1296,9 +1299,9 @@ int intel_opregion_init(struct drm_i915_private *i915) { struct intel_opregion *opregion = &i915->opregion; - if (IS_DGFX(i915)) + if (IS_DGFX(i915) && HAS_DISPLAY(i915)) opregion->opregion_func = &dgfx_opregion_func; - else + else if (!IS_DGFX(i915)) opregion->opregion_func = &igfx_opregion_func; return intel_opregion_setup(i915); -- 2.26.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/4] drm/i915/opregion: Register opreg func only for disp parts 2022-02-06 14:43 ` [Intel-gfx] [PATCH 2/4] drm/i915/opregion: Register opreg func only for disp parts Anshuman Gupta @ 2022-02-07 11:02 ` Jani Nikula 0 siblings, 0 replies; 11+ messages in thread From: Jani Nikula @ 2022-02-07 11:02 UTC (permalink / raw) To: Anshuman Gupta, intel-gfx; +Cc: lucas.demarchi On Sun, 06 Feb 2022, Anshuman Gupta <anshuman.gupta@intel.com> wrote: > It need to register opregion_func only for graphics sku > which has display. Use HAS_DISPLAY() to register > opregion_func. > > Cc: Badal Nilawar <badal.nilawar@intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> > --- > drivers/gpu/drm/i915/display/intel_opregion.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c > index 19f0558c0fbf..c1b558cdb99e 100644 > --- a/drivers/gpu/drm/i915/display/intel_opregion.c > +++ b/drivers/gpu/drm/i915/display/intel_opregion.c > @@ -860,6 +860,9 @@ static int intel_opregion_setup(struct drm_i915_private *dev_priv) > BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100); > BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400); > > + if (!opregion->opregion_func) > + return 0; > + > INIT_WORK(&opregion->asle_work, asle_work); > > base = opregion->opregion_func->alloc_opregion(dev_priv); > @@ -1296,9 +1299,9 @@ int intel_opregion_init(struct drm_i915_private *i915) > { > struct intel_opregion *opregion = &i915->opregion; > > - if (IS_DGFX(i915)) > + if (IS_DGFX(i915) && HAS_DISPLAY(i915)) > opregion->opregion_func = &dgfx_opregion_func; > - else > + else if (!IS_DGFX(i915)) > opregion->opregion_func = &igfx_opregion_func; This does not match the commit message. I don't know whether the code or the commit message is right. BR, Jani. > > return intel_opregion_setup(i915); -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915/dgfx: OPROM OpRegion Setup 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta 2022-02-06 14:43 ` [Intel-gfx] [PATCH 1/4] drm/i915/opregion: Abstract opregion function Anshuman Gupta 2022-02-06 14:43 ` [Intel-gfx] [PATCH 2/4] drm/i915/opregion: Register opreg func only for disp parts Anshuman Gupta @ 2022-02-06 14:43 ` Anshuman Gupta 2022-02-06 14:43 ` [Intel-gfx] [PATCH 4/4] drm/i915/dgfx: Get VBT from rvda Anshuman Gupta ` (4 subsequent siblings) 7 siblings, 0 replies; 11+ messages in thread From: Anshuman Gupta @ 2022-02-06 14:43 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula, lucas.demarchi On igfx cards ACPI OpRegion retrieve through ASLS. System BIOS writes ASLS address to pci config space(0xFC) but on discrete cards OpRegion is part of PCI Option ROM(OPROM) along with other firmware images, i915 is interested only in Code Signature System(CSS) and OpRegion + VBT image. DGFX Cards has it dedicated flash, where OPROM reside. DGFX card provides SPI controller interface to read the OPROM. Read OPROM through SPI MMIO because PCI ROM mapping may does not work on some platforms due to the BIOS not leaving the OPROM mapped. In order to setup OpRegion and retrieve VBT from OpRegion, it is required to do OPROM sanity check. OPROM Sanity checks involves below steps. Verify OPROM images Signature as Documented in PCI firmware Specs 3.2. Verify Intel CSS image signature. Verify the Intel CSS image code type. Authenticate OPROM RSA Signature. (TODO) Verify OpRegion image Signature. After successful sanity check, driver will consume the OPROM config data to get opreg and vbt accordingly. PCI Firmware Spec: ID:12886 https://pcisig.com/specifications Cc: Jani Nikula <jani.nikula@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Cc: Badal Nilawar <badal.nilawar@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_opregion.c | 332 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_opregion.h | 1 + 2 files changed, 317 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index c1b558cdb99e..5554b107900c 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -31,6 +31,7 @@ #include <acpi/video.h> #include "i915_drv.h" +#include "i915_reg.h" #include "intel_acpi.h" #include "intel_backlight.h" #include "intel_display_types.h" @@ -144,6 +145,34 @@ struct i915_opregion_func { void (*free_opregion)(struct drm_i915_private *i915); }; +/* Refer 8_PCI_Firmware_v3.2_01-26-2015_ts_clean_Firmware_Final Page 77 */ +struct expansion_rom_header { + u16 signature; /* Offset[0x0]: Header 0x55 0xAA */ + u8 resvd[0x16]; + u16 pcistructoffset; /* Offset[0x18]: Contains pointer PCI Data Structure */ + u16 img_base; /* Offset[0x1A]: Offset to Oprom Image Base start */ +} __packed; + +struct pci_data_structure { + u32 signature; + u8 resvd[12]; + u16 img_len; + u8 resvd1[2]; + u8 code_type; + u8 last_img; + u8 resvd2[6]; +} __packed; + +/* PCI Firmware Spec specific Macro */ +#define LAST_IMG_INDICATOR 0x80 +#define OPROM_IMAGE_MAGIC 0xAA55 /* Little Endian */ +#define OPROM_IMAGE_PCIR_MAGIC 0x52494350 /* "PCIR" */ +#define OPROM_BYTE_BOUNDARY 512 /* OPROM image sizes are in 512 byte */ + +#define INTEL_CSS_SIGNATURE "$CPD" /* Code Signature System Signature */ +#define NUM_CSS_BYTES 4 +#define INTEL_OPROM_CSS_CODE_TYPE 0xF0 + /* Driver readiness indicator */ #define ASLE_ARDY_READY (1 << 0) #define ASLE_ARDY_NOT_READY (0 << 0) @@ -846,6 +875,194 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) return ret; } +/* Refer PCI Firmware Spec Chapter 5 */ +static int +pci_exp_rom_check_signature(struct drm_i915_private *i915, + struct expansion_rom_header *exprom_hdr, + struct pci_data_structure *exprom_pci_data) +{ + if (exprom_hdr->signature != OPROM_IMAGE_MAGIC) { + drm_err(&i915->drm, "Invalid PCI ROM header signature.\n"); + return -EINVAL; + } + + if (exprom_pci_data->signature != OPROM_IMAGE_PCIR_MAGIC) { + drm_err(&i915->drm, "Invalid PCI ROM data signature.\n"); + return -EINVAL; + } + + return 0; +} + +static u32 intel_spi_oprom_offset(struct drm_i915_private *i915) +{ + u32 static_region, offset; + + /* initialize SPI to read the OPROM */ + static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); + static_region &= OPTIONROM_SPI_REGIONID_MASK; + intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region); + + /* read OPROM offset in SPI flash */ + offset = intel_uncore_read(&i915->uncore, OROM_OFFSET); + + return offset; +} + +static void intel_spi_read_oprom(struct drm_i915_private *i915, + u32 offset, size_t len, void *buf) +{ + u32 count, data; + u32 *word = buf; + + drm_WARN_ON(&i915->drm, !IS_ALIGNED(len, 4)); + + for (count = 0; count < len; count += 4) { + intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, offset + count); + data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); + word[count >> 2] = data; + } +} + +static int intel_verify_css(struct drm_i915_private *i915, + struct expansion_rom_header *exprom_hdr, + struct pci_data_structure *exprom_pci_data) +{ + if (exprom_pci_data->code_type != INTEL_OPROM_CSS_CODE_TYPE) { + drm_dbg_kms(&i915->drm, "Invalid OPROM CSS Code\n"); + return -EINVAL; + } + drm_dbg_kms(&i915->drm, "Found CSS image\n"); + /* + * TODO: Authticate OPROM RSA Signature if required in future + * pubic key and signature are present in CSS image. + */ + + return 0; +} + +/** + * intel_spi_get_oprom_opreg() get OPROM OpRegion image. + * @i915: pointer to i915 device. + * + * This function parses the DGFX OPROM to retieve the opregion. + * OPROM has bundled multiple images but i915 only interested + * in CSS and opregion image. + * + * + DGFX OPROM IMAGE LAYOUT + + * +--------+-------+---------------------------+ + * | Offset | Value | ROM Header Fields +-----> Image1 (CSS) + * +--------------------------------------------+ + * | 0h | 55h | ROM Signature Byte1 | + * | 1h | AAh | ROM Signature Byte2 | + * | 2h | xx | Reserved | + * | 18+19h| xx | Ptr to PCI DataStructure | + * +----------------+---------------------------+ + * | PCI Data Structure | + * +--------------------------------------------+ + * | . . . | + * | . . . | + * | 10 + xx + Image Length | + * | 14 + xx + Code Type | + * | 15 + xx + Last Image Indicator | + * | . . . | + * +--------------------------------------------+ + * | Signature and Public Key | + * +--------+-------+---------------------------+ + * | . | . | . | + * | . | . | . | + * +--------------------------------------------+ + * | Offset | Value | ROM Header Fields +-----> Image2 (opregion, vbt) (Offset: 0x800) + * +--------------------------------------------+ + * | 0h | 55h | ROM Signature Byte1 | + * | 1h | AAh | ROM Signature Byte2 | + * | 2h | xx | Reserved | + * | 18+19h| xx | Ptr to PCI DataStructure | + * +----------------+---------------------------+ + * | PCI Data Structure | + * +--------------------------------------------+ + * | . . . | + * | . . . | + * | 10 + xx + Image Length | + * | 14 + xx + Code Type | + * | 15 + xx + Last Image Indicator | + * | . . . | + * | 1A + 3C + Ptr to Opregion Signature | + * | . . . | + * | . . . | + * | 83Ch + IntelGraphicsMem | <---+ Opregion Signature + * +--------+-----------------------------------+ + * + * Return : Returns the opregion image blob which starts from opregion + * signature "IntelGraphicsMem". Error value in case of error + */ +static void * +intel_spi_get_oprom_opreg(struct drm_i915_private *i915) +{ + struct expansion_rom_header *exprom_hdr; + struct pci_data_structure *exprom_pci_data; + u8 img_sig[sizeof(OPREGION_SIGNATURE)]; + u32 oprom_offset, offset; + size_t img_len, opreg_len; + void *opreg = ERR_PTR(-ENXIO); + int ret; + + oprom_offset = intel_spi_oprom_offset(i915); + + exprom_hdr = kzalloc(sizeof(struct expansion_rom_header), GFP_KERNEL); + exprom_pci_data = kzalloc(sizeof(struct pci_data_structure), GFP_KERNEL); + if (!exprom_hdr || !exprom_pci_data) + return ERR_PTR(-ENOMEM); + + for (offset = oprom_offset; exprom_pci_data->last_img != LAST_IMG_INDICATOR; + offset = offset + img_len) { + intel_spi_read_oprom(i915, offset, sizeof(struct expansion_rom_header), + exprom_hdr); + intel_spi_read_oprom(i915, offset + exprom_hdr->pcistructoffset, + sizeof(struct pci_data_structure), exprom_pci_data); + ret = pci_exp_rom_check_signature(i915, exprom_hdr, exprom_pci_data); + if (ret) { + opreg = ERR_PTR(ret); + goto err_free_hdr; + } + + img_len = exprom_pci_data->img_len * OPROM_BYTE_BOUNDARY; + + /* CSS or OpReg signature is present at exprom_hdr->img_base offset */ + intel_spi_read_oprom(i915, offset + exprom_hdr->img_base, + sizeof(OPREGION_SIGNATURE) - 1, img_sig); + + if (!memcmp(img_sig, INTEL_CSS_SIGNATURE, NUM_CSS_BYTES)) { + ret = intel_verify_css(i915, exprom_hdr, exprom_pci_data); + if (ret) { + opreg = ERR_PTR(ret); + goto err_free_hdr; + } + } else if (!memcmp(img_sig, OPREGION_SIGNATURE, sizeof(OPREGION_SIGNATURE) - 1)) { + opreg_len = img_len - exprom_hdr->img_base; + opreg_len = ALIGN(opreg_len, 4); + opreg = kzalloc(opreg_len, GFP_KERNEL); + + if (!opreg) { + opreg = ERR_PTR(-ENOMEM); + goto err_free_hdr; + } + + intel_spi_read_oprom(i915, offset + exprom_hdr->img_base, + opreg_len, opreg); + drm_dbg_kms(&i915->drm, "Found opregion image of size %zu\n", opreg_len); + break; + } + } + + kfree(exprom_pci_data); + kfree(exprom_hdr); + +err_free_hdr: + + return opreg; +} + static int intel_opregion_setup(struct drm_i915_private *dev_priv) { struct intel_opregion *opregion = &dev_priv->opregion; @@ -956,6 +1173,17 @@ static int intel_opregion_setup(struct drm_i915_private *dev_priv) } out: + /* + * We might got VBT from OPROM OpRegion but we can't use OPROM OpRegion + * to write ACPI OpRegion MBOX. + */ + if (!opregion->asls) { + drm_dbg(&dev_priv->drm, "ACPI OpRegion MBOX is not supported!\n"); + opregion->acpi = NULL; + opregion->swsci = NULL; + opregion->asle = NULL; + } + return 0; } @@ -1168,20 +1396,32 @@ intel_opregion_get_asls(struct drm_i915_private *i915) pci_read_config_dword(pdev, ASLS, &asls); drm_dbg(&i915->drm, "graphic opregion physical addr: 0x%x\n", asls); - if (asls == 0) { - drm_dbg(&i915->drm, "ACPI OpRegion not supported!\n"); + if (asls == 0) return -EINVAL; - } opregion->asls = asls; return 0; } +static int +intel_opregion_verify_signature(struct drm_i915_private *i915, const void *base) +{ + char buf[sizeof(OPREGION_SIGNATURE)]; + + memcpy(buf, base, sizeof(buf)); + + if (memcmp(buf, OPREGION_SIGNATURE, 16)) { + drm_dbg(&i915->drm, "opregion signature mismatch\n"); + return -EINVAL; + } + + return 0; +} + static void *intel_igfx_alloc_opregion(struct drm_i915_private *i915) { struct intel_opregion *opregion = &i915->opregion; - char buf[sizeof(OPREGION_SIGNATURE)]; int err = 0; void *base; @@ -1193,20 +1433,13 @@ static void *intel_igfx_alloc_opregion(struct drm_i915_private *i915) if (!base) return ERR_PTR(-ENOMEM); - memcpy(buf, base, sizeof(buf)); - - if (memcmp(buf, OPREGION_SIGNATURE, 16)) { - drm_dbg(&i915->drm, "opregion signature mismatch\n"); - err = -EINVAL; - goto err_out; + err = intel_opregion_verify_signature(i915, base); + if (err) { + memunmap(base); + return ERR_PTR(err); } return base; - -err_out: - memunmap(base); - - return ERR_PTR(err); } static void *intel_igfx_alloc_rvda(struct drm_i915_private *i915) @@ -1257,9 +1490,70 @@ static void intel_igfx_free_opregion(struct drm_i915_private *i915) memunmap(opregion->header); } +static void *intel_dgfx_setup_asls(struct drm_i915_private *i915) +{ + struct intel_opregion *opregion = &i915->opregion; + struct opregion_asle *asls_asle; + const struct opregion_asle *spi_asle; + void *base; + int ret; + + if (!opregion->dgfx_oprom_opreg) + return ERR_PTR(-EINVAL); + + spi_asle = opregion->dgfx_oprom_opreg + OPREGION_ASLE_OFFSET; + + /* + * DGFX MBD configs supports ASL storage. + * Populate the RVDA and RVDA field from OPROM opregion. + */ + base = memremap(opregion->asls, OPREGION_SIZE, MEMREMAP_WB); + if (!base) + return ERR_PTR(-ENOMEM); + + ret = intel_opregion_verify_signature(i915, base); + if (ret) { + memunmap(base); + return ERR_PTR(ret); + } + + asls_asle = base + OPREGION_ASLE_OFFSET; + asls_asle->rvda = spi_asle->rvda; + asls_asle->rvds = spi_asle->rvds; + + return base; +} + static void *intel_dgfx_alloc_opregion(struct drm_i915_private *i915) { - return ERR_PTR(-EOPNOTSUPP); + struct intel_opregion *opregion = &i915->opregion; + void *oprom_opreg; + void *asls_opreg; + + BUILD_BUG_ON(sizeof(struct expansion_rom_header) != 28); + BUILD_BUG_ON(sizeof(struct pci_data_structure) != 28); + + oprom_opreg = intel_spi_get_oprom_opreg(i915); + + if (IS_ERR(oprom_opreg)) { + drm_err(&i915->drm, "Unable to get opregion image from dgfx oprom Err: %ld\n", + PTR_ERR(oprom_opreg)); + return oprom_opreg; + } + + /* Cache the OPROM opregion + vbt image to retrieve vbt later */ + opregion->dgfx_oprom_opreg = oprom_opreg; + + if (!intel_opregion_get_asls(i915)) { + asls_opreg = intel_dgfx_setup_asls(i915); + if (!IS_ERR(asls_opreg)) + return asls_opreg; + } + + oprom_opreg = kzalloc(OPREGION_SIZE, GFP_KERNEL); + memcpy(oprom_opreg, opregion->dgfx_oprom_opreg, OPREGION_SIZE); + + return oprom_opreg; } static void *intel_dgfx_alloc_rvda(struct drm_i915_private *i915) @@ -1273,6 +1567,12 @@ static void intel_dgfx_free_rvda(struct drm_i915_private *i915) static void intel_dgfx_free_opregion(struct drm_i915_private *i915) { + struct intel_opregion *opregion = &i915->opregion; + + if (opregion->asls) + memunmap(opregion->header); + else + kfree(opregion->header); } static const struct i915_opregion_func igfx_opregion_func = { diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h index 4ff48c445044..de5bc5dd423c 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.h +++ b/drivers/gpu/drm/i915/display/intel_opregion.h @@ -52,6 +52,7 @@ struct intel_opregion { void *rvda; void *vbt_firmware; const void *vbt; + const void *dgfx_oprom_opreg; u32 vbt_size; u32 *lid_state; struct work_struct asle_work; -- 2.26.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH 4/4] drm/i915/dgfx: Get VBT from rvda 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta ` (2 preceding siblings ...) 2022-02-06 14:43 ` [Intel-gfx] [PATCH 3/4] drm/i915/dgfx: OPROM OpRegion Setup Anshuman Gupta @ 2022-02-06 14:43 ` Anshuman Gupta 2022-02-06 15:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX OpRegion Patchwork ` (3 subsequent siblings) 7 siblings, 0 replies; 11+ messages in thread From: Anshuman Gupta @ 2022-02-06 14:43 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula, lucas.demarchi Since OpRegion ver 2.1 MBOX3 RVDA field is Relative address of Raw VBT data from OpRegion Base. Populate the opreion->rvda accordingly. As Intel DGFX cards supports OpRegion version 2.2 or greater, RVDA as an absolute VBT physical address (Ver 2.0) doesn't applicable to DGFX cards. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Badal Nilawar <badal.nilawar@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_opregion.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index 5554b107900c..ea8b6ff41151 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -1558,11 +1558,28 @@ static void *intel_dgfx_alloc_opregion(struct drm_i915_private *i915) static void *intel_dgfx_alloc_rvda(struct drm_i915_private *i915) { - return ERR_PTR(-EOPNOTSUPP); + struct intel_opregion *opregion = &i915->opregion; + void *opreg_rvda; + + if (!opregion->dgfx_oprom_opreg) + return ERR_PTR(-EINVAL); + + opreg_rvda = kzalloc(opregion->asle->rvds, GFP_KERNEL); + memcpy(opreg_rvda, opregion->dgfx_oprom_opreg + opregion->asle->rvda, opregion->asle->rvds); + + /* We got RVDA, OPROM opregion + vbt image not nedded anymore */ + kfree(opregion->dgfx_oprom_opreg); + opregion->dgfx_oprom_opreg = NULL; + + return opreg_rvda; } static void intel_dgfx_free_rvda(struct drm_i915_private *i915) { + struct intel_opregion *opregion = &i915->opregion; + + kfree(opregion->rvda); + opregion->rvda = NULL; } static void intel_dgfx_free_opregion(struct drm_i915_private *i915) -- 2.26.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX OpRegion 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta ` (3 preceding siblings ...) 2022-02-06 14:43 ` [Intel-gfx] [PATCH 4/4] drm/i915/dgfx: Get VBT from rvda Anshuman Gupta @ 2022-02-06 15:14 ` Patchwork 2022-02-06 15:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork ` (2 subsequent siblings) 7 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2022-02-06 15:14 UTC (permalink / raw) To: Anshuman Gupta; +Cc: intel-gfx == Series Details == Series: DGFX OpRegion URL : https://patchwork.freedesktop.org/series/99738/ State : warning == Summary == $ dim checkpatch origin/drm-tip f2cee5f27f9b drm/i915/opregion: Abstract opregion function 7b611238fd8b drm/i915/opregion: Register opreg func only for disp parts 00e2ab253c8f drm/i915/dgfx: OPROM OpRegion Setup -:225: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*exprom_hdr)...) over kzalloc(sizeof(struct expansion_rom_header)...) #225: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:1012: + exprom_hdr = kzalloc(sizeof(struct expansion_rom_header), GFP_KERNEL); -:226: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*exprom_pci_data)...) over kzalloc(sizeof(struct pci_data_structure)...) #226: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:1013: + exprom_pci_data = kzalloc(sizeof(struct pci_data_structure), GFP_KERNEL); total: 0 errors, 0 warnings, 2 checks, 402 lines checked 40697cd393f3 drm/i915/dgfx: Get VBT from rvda ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DGFX OpRegion 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta ` (4 preceding siblings ...) 2022-02-06 15:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX OpRegion Patchwork @ 2022-02-06 15:15 ` Patchwork 2022-02-06 15:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-02-06 17:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 7 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2022-02-06 15:15 UTC (permalink / raw) To: Anshuman Gupta; +Cc: intel-gfx == Series Details == Series: DGFX OpRegion URL : https://patchwork.freedesktop.org/series/99738/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for DGFX OpRegion 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta ` (5 preceding siblings ...) 2022-02-06 15:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork @ 2022-02-06 15:48 ` Patchwork 2022-02-06 17:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 7 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2022-02-06 15:48 UTC (permalink / raw) To: Anshuman Gupta; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 8245 bytes --] == Series Details == Series: DGFX OpRegion URL : https://patchwork.freedesktop.org/series/99738/ State : success == Summary == CI Bug Log - changes from CI_DRM_11190 -> Patchwork_22186 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/index.html Participating hosts (46 -> 43) ------------------------------ Additional (2): bat-jsl-2 fi-pnv-d510 Missing (5): shard-tglu bat-rpls-2 fi-bsw-cyan shard-rkl shard-dg1 Known issues ------------ Here are the changes found in Patchwork_22186 that come from known issues: ### CI changes ### #### Possible fixes #### * boot: - fi-bxt-dsi: [FAIL][1] ([i915#4912]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/fi-bxt-dsi/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-bxt-dsi/boot.html ### IGT changes ### #### Issues hit #### * igt@amdgpu/amd_cs_nop@fork-gfx0: - fi-icl-u2: NOTRUN -> [SKIP][3] ([fdo#109315]) +17 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-icl-u2/igt@amdgpu/amd_cs_nop@fork-gfx0.html * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-snb-2600: NOTRUN -> [SKIP][4] ([fdo#109271]) +17 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html * igt@gem_huc_copy@huc-copy: - fi-pnv-d510: NOTRUN -> [SKIP][5] ([fdo#109271]) +57 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-pnv-d510/igt@gem_huc_copy@huc-copy.html - fi-bxt-dsi: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-bxt-dsi: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-bxt-dsi/igt@gem_lmem_swapping@parallel-random-engines.html * igt@i915_selftest@live@hangcheck: - fi-hsw-4770: [PASS][8] -> [INCOMPLETE][9] ([i915#3303]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html * igt@kms_chamelium@dp-hpd-fast: - fi-bxt-dsi: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-bxt-dsi/igt@kms_chamelium@dp-hpd-fast.html * igt@kms_force_connector_basic@force-load-detect: - fi-bxt-dsi: NOTRUN -> [SKIP][11] ([fdo#109271]) +30 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-bxt-dsi/igt@kms_force_connector_basic@force-load-detect.html - fi-icl-u2: NOTRUN -> [SKIP][12] ([fdo#109285]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-bxt-dsi: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#533]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-bxt-dsi/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html - fi-icl-u2: NOTRUN -> [SKIP][14] ([fdo#109278]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-icl-u2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html * igt@prime_vgem@basic-userptr: - fi-icl-u2: NOTRUN -> [SKIP][15] ([i915#3301]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-icl-u2/igt@prime_vgem@basic-userptr.html * igt@runner@aborted: - fi-hsw-4770: NOTRUN -> [FAIL][16] ([fdo#109271] / [i915#1436] / [i915#4312]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-hsw-4770/igt@runner@aborted.html #### Possible fixes #### * igt@i915_selftest@live@hangcheck: - bat-dg1-5: [DMESG-FAIL][17] ([i915#4494] / [i915#4957]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/bat-dg1-5/igt@i915_selftest@live@hangcheck.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/bat-dg1-5/igt@i915_selftest@live@hangcheck.html - fi-snb-2600: [INCOMPLETE][19] ([i915#3921]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/fi-snb-2600/igt@i915_selftest@live@hangcheck.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-snb-2600/igt@i915_selftest@live@hangcheck.html * igt@i915_selftest@live@requests: - fi-kbl-soraka: [INCOMPLETE][21] -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/fi-kbl-soraka/igt@i915_selftest@live@requests.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-kbl-soraka/igt@i915_selftest@live@requests.html * igt@kms_flip@basic-flip-vs-dpms@b-edp1: - fi-icl-u2: [DMESG-WARN][23] -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/fi-icl-u2/igt@kms_flip@basic-flip-vs-dpms@b-edp1.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-icl-u2/igt@kms_flip@basic-flip-vs-dpms@b-edp1.html * igt@kms_flip@basic-flip-vs-dpms@c-dp2: - fi-icl-u2: [INCOMPLETE][25] -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/fi-icl-u2/igt@kms_flip@basic-flip-vs-dpms@c-dp2.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-icl-u2/igt@kms_flip@basic-flip-vs-dpms@c-dp2.html * igt@kms_frontbuffer_tracking@basic: - fi-cml-u2: [DMESG-WARN][27] ([i915#4269]) -> [PASS][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303 [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4912]: https://gitlab.freedesktop.org/drm/intel/issues/4912 [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 Build changes ------------- * Linux: CI_DRM_11190 -> Patchwork_22186 CI-20190529: 20190529 CI_DRM_11190: a41347db2c2a68295fb2e45614ad97be0444c3f4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6339: 9cd99d763440ae75d9981ce4e361d3deb5edb4e4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_22186: 40697cd393f318ad5c3df51d9861455946e8ea41 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 40697cd393f3 drm/i915/dgfx: Get VBT from rvda 00e2ab253c8f drm/i915/dgfx: OPROM OpRegion Setup 7b611238fd8b drm/i915/opregion: Register opreg func only for disp parts f2cee5f27f9b drm/i915/opregion: Abstract opregion function == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/index.html [-- Attachment #2: Type: text/html, Size: 9745 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for DGFX OpRegion 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta ` (6 preceding siblings ...) 2022-02-06 15:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2022-02-06 17:05 ` Patchwork 7 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2022-02-06 17:05 UTC (permalink / raw) To: Anshuman Gupta; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 30236 bytes --] == Series Details == Series: DGFX OpRegion URL : https://patchwork.freedesktop.org/series/99738/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11190_full -> Patchwork_22186_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_22186_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_22186_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (13 -> 13) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_22186_full: ### IGT changes ### #### Possible regressions #### * igt@i915_selftest@live@guc_multi_lrc: - shard-skl: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-skl7/igt@i915_selftest@live@guc_multi_lrc.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl8/igt@i915_selftest@live@guc_multi_lrc.html * igt@kms_flip@flip-vs-fences-interruptible@a-vga1: - shard-snb: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-snb5/igt@kms_flip@flip-vs-fences-interruptible@a-vga1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-snb4/igt@kms_flip@flip-vs-fences-interruptible@a-vga1.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen: - {shard-dg1}: [PASS][5] -> [DMESG-WARN][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-dg1-16/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-dg1-18/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html Known issues ------------ Here are the changes found in Patchwork_22186_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_create@create-massive: - shard-skl: NOTRUN -> [DMESG-WARN][7] ([i915#4991]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl1/igt@gem_create@create-massive.html * igt@gem_eio@kms: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#232]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-tglb7/igt@gem_eio@kms.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb2/igt@gem_eio@kms.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb7/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-none@rcs0: - shard-kbl: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-kbl3/igt@gem_exec_fair@basic-none@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl7/igt@gem_exec_fair@basic-none@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][14] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2849]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_huc_copy@huc-copy: - shard-skl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#2190]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl7/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@heavy-multi: - shard-skl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +1 similar issue [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl1/igt@gem_lmem_swapping@heavy-multi.html * igt@gem_media_vme: - shard-tglb: NOTRUN -> [SKIP][19] ([i915#284]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@gem_media_vme.html * igt@gem_pxp@reject-modify-context-protection-off-1: - shard-tglb: NOTRUN -> [SKIP][20] ([i915#4270]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@gem_pxp@reject-modify-context-protection-off-1.html * igt@gem_softpin@evict-snoop: - shard-tglb: NOTRUN -> [SKIP][21] ([fdo#109312]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@gem_softpin@evict-snoop.html * igt@gem_userptr_blits@input-checking: - shard-skl: NOTRUN -> [DMESG-WARN][22] ([i915#4990]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl6/igt@gem_userptr_blits@input-checking.html * igt@gen3_render_tiledy_blits: - shard-tglb: NOTRUN -> [SKIP][23] ([fdo#109289]) +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@gen3_render_tiledy_blits.html * igt@gen9_exec_parse@allowed-single: - shard-tglb: NOTRUN -> [SKIP][24] ([i915#2527] / [i915#2856]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@gen9_exec_parse@allowed-single.html * igt@i915_pm_backlight@fade_with_dpms: - shard-kbl: NOTRUN -> [SKIP][25] ([fdo#109271]) +20 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl1/igt@i915_pm_backlight@fade_with_dpms.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][26] -> [FAIL][27] ([i915#454]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-iclb8/igt@i915_pm_dc@dc6-psr.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-iclb6/igt@i915_pm_dc@dc6-psr.html * igt@i915_pm_dc@dc9-dpms: - shard-tglb: NOTRUN -> [SKIP][28] ([i915#4281]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@i915_pm_dc@dc9-dpms.html * igt@i915_selftest@live@gt_lrc: - shard-tglb: NOTRUN -> [DMESG-FAIL][29] ([i915#2373]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@i915_selftest@live@gt_lrc.html * igt@i915_selftest@live@gt_pm: - shard-tglb: NOTRUN -> [DMESG-FAIL][30] ([i915#1759]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@i915_selftest@live@gt_pm.html * igt@kms_big_fb@linear-32bpp-rotate-270: - shard-tglb: NOTRUN -> [SKIP][31] ([fdo#111614]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_big_fb@linear-32bpp-rotate-270.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-tglb: NOTRUN -> [SKIP][32] ([fdo#111615]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3886]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl1/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs: - shard-skl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3886]) +2 similar issues [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl1/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3886]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs: - shard-tglb: NOTRUN -> [SKIP][36] ([i915#3689] / [i915#3886]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][37] ([i915#3689]) +2 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_ccs.html * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc: - shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271]) +88 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl7/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html * igt@kms_chamelium@common-hpd-after-suspend: - shard-apl: NOTRUN -> [SKIP][39] ([fdo#109271] / [fdo#111827]) +2 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@hdmi-hpd: - shard-skl: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +6 similar issues [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl4/igt@kms_chamelium@hdmi-hpd.html * igt@kms_color_chamelium@pipe-b-ctm-0-75: - shard-tglb: NOTRUN -> [SKIP][41] ([fdo#109284] / [fdo#111827]) +2 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_color_chamelium@pipe-b-ctm-0-75.html * igt@kms_content_protection@atomic: - shard-apl: NOTRUN -> [TIMEOUT][42] ([i915#1319]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@kms_content_protection@atomic.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-tglb: NOTRUN -> [SKIP][43] ([i915#3116] / [i915#3299]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_cursor_crc@pipe-b-cursor-32x32-sliding: - shard-tglb: NOTRUN -> [SKIP][44] ([i915#3319]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb8/igt@kms_cursor_crc@pipe-b-cursor-32x32-sliding.html * igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding: - shard-tglb: NOTRUN -> [SKIP][45] ([fdo#109279] / [i915#3359]) +1 similar issue [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: [PASS][46] -> [DMESG-WARN][47] ([i915#180]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_crc@pipe-d-cursor-32x10-onscreen: - shard-tglb: NOTRUN -> [SKIP][48] ([i915#3359]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_cursor_crc@pipe-d-cursor-32x10-onscreen.html * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: - shard-tglb: NOTRUN -> [SKIP][49] ([fdo#109274] / [fdo#111825]) +2 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html * igt@kms_cursor_legacy@pipe-d-torture-bo: - shard-apl: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#533]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@kms_cursor_legacy@pipe-d-torture-bo.html * igt@kms_flip@2x-flip-vs-panning: - shard-apl: NOTRUN -> [SKIP][51] ([fdo#109271]) +35 similar issues [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@kms_flip@2x-flip-vs-panning.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1: - shard-apl: [PASS][52] -> [FAIL][53] ([i915#79]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-apl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1: - shard-apl: [PASS][54] -> [DMESG-WARN][55] ([i915#180]) +2 similar issues [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling: - shard-tglb: NOTRUN -> [SKIP][56] ([i915#2587]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt: - shard-tglb: NOTRUN -> [SKIP][57] ([fdo#109280] / [fdo#111825]) +7 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt.html * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d: - shard-kbl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#533]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl1/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes: - shard-snb: [PASS][59] -> [SKIP][60] ([fdo#109271]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-snb7/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-snb2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-apl: NOTRUN -> [FAIL][61] ([fdo#108145] / [i915#265]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: - shard-skl: NOTRUN -> [FAIL][62] ([fdo#108145] / [i915#265]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html * igt@kms_plane_lowres@pipe-d-tiling-x: - shard-tglb: NOTRUN -> [SKIP][63] ([i915#3536]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_plane_lowres@pipe-d-tiling-x.html * igt@kms_psr2_su@page_flip-xrgb8888: - shard-skl: NOTRUN -> [SKIP][64] ([fdo#109271] / [i915#658]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl7/igt@kms_psr2_su@page_flip-xrgb8888.html * igt@kms_psr@psr2_primary_page_flip: - shard-tglb: NOTRUN -> [FAIL][65] ([i915#132] / [i915#3467]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_psr@psr2_primary_page_flip.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][66] -> [SKIP][67] ([fdo#109441]) +2 similar issues [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_setmode@basic: - shard-apl: [PASS][68] -> [FAIL][69] ([i915#31]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-apl1/igt@kms_setmode@basic.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl1/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend: - shard-skl: NOTRUN -> [INCOMPLETE][70] ([i915#4939]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl7/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html * igt@kms_vrr@flip-dpms: - shard-tglb: NOTRUN -> [SKIP][71] ([fdo#109502]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@kms_vrr@flip-dpms.html * igt@prime_nv_pcopy@test3_3: - shard-tglb: NOTRUN -> [SKIP][72] ([fdo#109291]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@prime_nv_pcopy@test3_3.html * igt@prime_vgem@fence-flip-hang: - shard-tglb: NOTRUN -> [SKIP][73] ([fdo#109295]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@prime_vgem@fence-flip-hang.html * igt@sysfs_clients@fair-0: - shard-kbl: NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#2994]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl1/igt@sysfs_clients@fair-0.html * igt@sysfs_clients@split-10: - shard-apl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#2994]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@sysfs_clients@split-10.html * igt@sysfs_clients@split-50: - shard-skl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#2994]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl6/igt@sysfs_clients@split-50.html #### Possible fixes #### * igt@gem_exec_balancer@parallel-keep-submit-fence: - shard-iclb: [SKIP][77] ([i915#4525]) -> [PASS][78] +1 similar issue [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-iclb7/igt@gem_exec_balancer@parallel-keep-submit-fence.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-iclb1/igt@gem_exec_balancer@parallel-keep-submit-fence.html * igt@gem_exec_fair@basic-none@rcs0: - shard-glk: [FAIL][79] ([i915#2842]) -> [PASS][80] [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-glk6/igt@gem_exec_fair@basic-none@rcs0.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [FAIL][81] ([i915#2842]) -> [PASS][82] [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html - {shard-tglu}: [FAIL][83] ([i915#2842]) -> [PASS][84] [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-tglu-2/igt@gem_exec_fair@basic-pace-share@rcs0.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglu-3/igt@gem_exec_fair@basic-pace-share@rcs0.html - {shard-rkl}: ([PASS][85], [FAIL][86]) ([i915#2842]) -> [PASS][87] [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@gem_exec_fair@basic-pace-share@rcs0.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-6/igt@gem_exec_fair@basic-pace-share@rcs0.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-kbl: [FAIL][88] ([i915#2842]) -> [PASS][89] [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs0.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs0.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [SKIP][90] ([i915#2190]) -> [PASS][91] [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-tglb7/igt@gem_huc_copy@huc-copy.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-tglb1/igt@gem_huc_copy@huc-copy.html * igt@i915_pm_backlight@fade_with_suspend: - {shard-rkl}: [SKIP][92] ([i915#3012]) -> [PASS][93] [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@i915_pm_backlight@fade_with_suspend.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@i915_pm_backlight@fade_with_suspend.html * igt@i915_pm_dc@dc9-dpms: - shard-iclb: [SKIP][94] ([i915#4281]) -> [PASS][95] [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-iclb8/igt@i915_pm_dc@dc9-dpms.html * igt@i915_pm_rpm@gem-execbuf: - {shard-rkl}: ([SKIP][96], [SKIP][97]) ([fdo#109308]) -> [PASS][98] [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-1/igt@i915_pm_rpm@gem-execbuf.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@i915_pm_rpm@gem-execbuf.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@i915_pm_rpm@gem-execbuf.html * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait: - {shard-dg1}: [SKIP][99] ([i915#1397]) -> [PASS][100] +1 similar issue [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-dg1-18/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-dg1-16/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@i915_pm_rps@basic-api: - {shard-dg1}: [FAIL][101] ([i915#4032]) -> [PASS][102] [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-dg1-12/igt@i915_pm_rps@basic-api.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-dg1-12/igt@i915_pm_rps@basic-api.html * igt@kms_atomic@plane-overlay-legacy: - {shard-rkl}: ([SKIP][103], [SKIP][104]) ([i915#1845]) -> [PASS][105] +2 similar issues [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-1/igt@kms_atomic@plane-overlay-legacy.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@kms_atomic@plane-overlay-legacy.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_atomic@plane-overlay-legacy.html * igt@kms_big_fb@linear-32bpp-rotate-0: - {shard-rkl}: ([SKIP][106], [PASS][107]) ([i915#1845]) -> [PASS][108] [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@kms_big_fb@linear-32bpp-rotate-0.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-0.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-0.html - shard-glk: [DMESG-WARN][109] ([i915#118]) -> [PASS][110] [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-glk7/igt@kms_big_fb@linear-32bpp-rotate-0.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-glk9/igt@kms_big_fb@linear-32bpp-rotate-0.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180: - shard-glk: [FAIL][111] ([i915#1888]) -> [PASS][112] [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-glk5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-glk7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs: - {shard-rkl}: [SKIP][113] ([i915#1845] / [i915#4098]) -> [PASS][114] +1 similar issue [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-1/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs.html * igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen: - {shard-rkl}: ([PASS][115], [SKIP][116]) ([fdo#112022]) -> [PASS][117] [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html * igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent: - {shard-rkl}: [SKIP][118] ([fdo#112022]) -> [PASS][119] [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html * igt@kms_cursor_edge_walk@pipe-a-256x256-top-edge: - {shard-rkl}: [SKIP][120] ([i915#1849] / [i915#4070]) -> [PASS][121] [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-1/igt@kms_cursor_edge_walk@pipe-a-256x256-top-edge.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_cursor_edge_walk@pipe-a-256x256-top-edge.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic: - {shard-rkl}: [SKIP][122] ([fdo#111825] / [i915#4070]) -> [PASS][123] +1 similar issue [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-1/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html * igt@kms_cursor_legacy@cursor-vs-flip-legacy: - {shard-rkl}: [SKIP][124] ([fdo#111825]) -> [PASS][125] +1 similar issue [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-skl: [FAIL][126] ([i915#2346]) -> [PASS][127] [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled: - {shard-rkl}: [SKIP][128] ([fdo#111314]) -> [PASS][129] +1 similar issue [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-1/igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled.html * igt@kms_draw_crc@draw-method-xrgb8888-pwrite-ytiled: - {shard-rkl}: [SKIP][130] ([i915#4098]) -> [PASS][131] +2 similar issues [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@kms_draw_crc@draw-method-xrgb8888-pwrite-ytiled.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb8888-pwrite-ytiled.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: [INCOMPLETE][132] ([i915#180] / [i915#1982]) -> [PASS][133] [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_fbcon_fbt@psr-suspend: - {shard-rkl}: ([SKIP][134], [SKIP][135]) ([fdo#110189] / [i915#3955]) -> [PASS][136] [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-4/igt@kms_fbcon_fbt@psr-suspend.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-rkl-1/igt@kms_fbcon_fbt@psr-suspend.html [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1: - shard-kbl: [INCOMPLETE][137] ([i915#636]) -> [PASS][138] [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html * igt@kms_flip@plain-flip-ts-check@c-edp1: - shard-skl: [FAIL][139] ([i915#2122]) -> [PASS][140] [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-skl8/igt@kms_flip@plain-flip-ts-check@c-edp1.html [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-skl8/igt@kms_flip@plain-flip-ts-check@c-edp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling: - shard-glk: [FAIL][141] ([i915#4911]) -> [PASS][142] [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-glk2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling: - shard-iclb: [SKIP][143] ([i915#3701]) -> [PASS][144] [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11190/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html * igt@kms_ == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22186/index.html [-- Attachment #2: Type: text/html, Size: 33352 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2022-02-07 11:02 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-02-06 14:43 [Intel-gfx] [PATCH 0/4] DGFX OpRegion Anshuman Gupta 2022-02-06 14:43 ` [Intel-gfx] [PATCH 1/4] drm/i915/opregion: Abstract opregion function Anshuman Gupta 2022-02-07 10:59 ` Jani Nikula 2022-02-06 14:43 ` [Intel-gfx] [PATCH 2/4] drm/i915/opregion: Register opreg func only for disp parts Anshuman Gupta 2022-02-07 11:02 ` Jani Nikula 2022-02-06 14:43 ` [Intel-gfx] [PATCH 3/4] drm/i915/dgfx: OPROM OpRegion Setup Anshuman Gupta 2022-02-06 14:43 ` [Intel-gfx] [PATCH 4/4] drm/i915/dgfx: Get VBT from rvda Anshuman Gupta 2022-02-06 15:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX OpRegion Patchwork 2022-02-06 15:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-02-06 15:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-02-06 17:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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