* [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step
@ 2022-02-08 21:35 José Roberto de Souza
2022-02-08 23:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (9 more replies)
0 siblings, 10 replies; 11+ messages in thread
From: José Roberto de Souza @ 2022-02-08 21:35 UTC (permalink / raw)
To: intel-gfx
A new programming step was added to combo and TC PLL sequences.
If override_AFC_startup is set in VBT, driver should overwrite
AFC_startup value to 0x7 in PLL's div0 register.
The current understating is that only TGL needs this and all display
12 and newer platforms will have a older VBT or a newer VBT with
override_AFC_startup set to 0 but in any case there is a
drm_warn_on_once() to let us know if this is not true.
BSpec: 49204
BSpec: 20122 (pending aproval, check working copies)
BSpec: 49968
BSpec: 71360
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 4 ++
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 +++++++++++++------
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 6 ++-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 8 ++++
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_reg.h | 13 +++++++
6 files changed, 57 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index aec0efd5350ef..a4134b63f2d49 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -596,6 +596,10 @@ parse_general_features(struct drm_i915_private *i915,
} else {
i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
}
+
+ if (bdb->version >= 249)
+ i915->vbt.override_afc_startup_bit = general->override_afc_startup_bit;
+
drm_dbg_kms(&i915->drm,
"BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
i915->vbt.int_tv_support,
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 6723c3de5a80c..a60917b926de9 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -2748,6 +2748,9 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
pll_state->cfgcr1 |= TGL_DPLL_CFGCR1_CFSELOVRD_NORMAL_XTAL;
else
pll_state->cfgcr1 |= DPLL_CFGCR1_CENTRAL_FREQ_8400;
+
+ if (i915->vbt.override_afc_startup_bit)
+ pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
}
static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
@@ -2949,6 +2952,8 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
DKL_PLL_DIV0_PROP_COEFF(prop_coeff) |
DKL_PLL_DIV0_FBPREDIV(m1div) |
DKL_PLL_DIV0_FBDIV_INT(m2div_int);
+ if (dev_priv->vbt.override_afc_startup_bit)
+ pll_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
pll_state->mg_pll_div1 = DKL_PLL_DIV1_IREF_TRIM(iref_trim) |
DKL_PLL_DIV1_TDC_TARGET_CNT(tdc_targetcnt);
@@ -3448,10 +3453,10 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *dev_priv,
MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO_MASK;
hw_state->mg_pll_div0 = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port));
- hw_state->mg_pll_div0 &= (DKL_PLL_DIV0_INTEG_COEFF_MASK |
- DKL_PLL_DIV0_PROP_COEFF_MASK |
- DKL_PLL_DIV0_FBPREDIV_MASK |
- DKL_PLL_DIV0_FBDIV_INT_MASK);
+ val = DKL_PLL_DIV0_MASK;
+ if (dev_priv->vbt.override_afc_startup_bit)
+ val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
+ hw_state->mg_pll_div0 &= val;
hw_state->mg_pll_div1 = intel_de_read(dev_priv, DKL_PLL_DIV1(tc_port));
hw_state->mg_pll_div1 &= (DKL_PLL_DIV1_IREF_TRIM_MASK |
@@ -3513,6 +3518,10 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv,
TGL_DPLL_CFGCR0(id));
hw_state->cfgcr1 = intel_de_read(dev_priv,
TGL_DPLL_CFGCR1(id));
+ if (dev_priv->vbt.override_afc_startup_bit) {
+ hw_state->div0 = intel_de_read(dev_priv, TGL_DPLL0_DIV0(id));
+ hw_state->div0 &= TGL_DPLL0_DIV0_AFC_STARTUP_MASK;
+ }
} else {
if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) {
hw_state->cfgcr0 = intel_de_read(dev_priv,
@@ -3554,7 +3563,7 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
{
struct intel_dpll_hw_state *hw_state = &pll->state.hw_state;
const enum intel_dpll_id id = pll->info->id;
- i915_reg_t cfgcr0_reg, cfgcr1_reg;
+ i915_reg_t cfgcr0_reg, cfgcr1_reg, div0_reg = INVALID_MMIO_REG;
if (IS_ALDERLAKE_S(dev_priv)) {
cfgcr0_reg = ADLS_DPLL_CFGCR0(id);
@@ -3568,6 +3577,7 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
} else if (DISPLAY_VER(dev_priv) >= 12) {
cfgcr0_reg = TGL_DPLL_CFGCR0(id);
cfgcr1_reg = TGL_DPLL_CFGCR1(id);
+ div0_reg = TGL_DPLL0_DIV0(id);
} else {
if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) {
cfgcr0_reg = ICL_DPLL_CFGCR0(4);
@@ -3580,6 +3590,12 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
intel_de_write(dev_priv, cfgcr0_reg, hw_state->cfgcr0);
intel_de_write(dev_priv, cfgcr1_reg, hw_state->cfgcr1);
+ drm_WARN_ON_ONCE(&dev_priv->drm, dev_priv->vbt.override_afc_startup_bit &&
+ !i915_mmio_reg_valid(div0_reg));
+ if (dev_priv->vbt.override_afc_startup_bit &&
+ i915_mmio_reg_valid(div0_reg))
+ intel_de_rmw(dev_priv, div0_reg, TGL_DPLL0_DIV0_AFC_STARTUP_MASK,
+ hw_state->div0);
intel_de_posting_read(dev_priv, cfgcr1_reg);
}
@@ -3667,13 +3683,11 @@ static void dkl_pll_write(struct drm_i915_private *dev_priv,
val |= hw_state->mg_clktop2_hsclkctl;
intel_de_write(dev_priv, DKL_CLKTOP2_HSCLKCTL(tc_port), val);
- val = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port));
- val &= ~(DKL_PLL_DIV0_INTEG_COEFF_MASK |
- DKL_PLL_DIV0_PROP_COEFF_MASK |
- DKL_PLL_DIV0_FBPREDIV_MASK |
- DKL_PLL_DIV0_FBDIV_INT_MASK);
- val |= hw_state->mg_pll_div0;
- intel_de_write(dev_priv, DKL_PLL_DIV0(tc_port), val);
+ val = DKL_PLL_DIV0_MASK;
+ if (dev_priv->vbt.override_afc_startup_bit)
+ val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
+ intel_de_rmw(dev_priv, DKL_PLL_DIV0(tc_port), val,
+ hw_state->mg_pll_div0);
val = intel_de_read(dev_priv, DKL_PLL_DIV1(tc_port));
val &= ~(DKL_PLL_DIV1_IREF_TRIM_MASK |
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index 91fe181462b2e..4125d7ab54438 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -218,7 +218,11 @@ struct intel_dpll_hw_state {
u32 mg_refclkin_ctl;
u32 mg_clktop2_coreclkctl1;
u32 mg_clktop2_hsclkctl;
- u32 mg_pll_div0;
+ /* tgl+ */
+ union {
+ u32 div0;
+ u32 mg_pll_div0;
+ };
u32 mg_pll_div1;
u32 mg_pll_lf;
u32 mg_pll_frac_lock;
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index a39d6cfea87aa..a813ebedcae81 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -162,6 +162,14 @@ struct bdb_general_features {
u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
u8 dp_ssc_dongle_supported:1;
u8 rsvd11:2; /* finish byte */
+
+ /* byte 6 */
+ u8 tc_hpd_retry_timeout:7; /* 242 */
+ u8 rsvd12:1;
+
+ /* byte 7 */
+ u8 override_afc_startup_bit:1;/* 249 */
+ u8 rsvd13:7;
} __packed;
/*
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8c1706fd81f9e..c04312a8dd520 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -532,6 +532,7 @@ struct intel_vbt_data {
int lvds_ssc_freq;
unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
enum drm_panel_orientation orientation;
+ bool override_afc_startup_bit;
enum drrs_support_type drrs_type;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 87c92314ee269..d51bdc1105037 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7986,6 +7986,13 @@ enum skl_power_gate {
#define RKL_DPLL_CFGCR0(pll) _MMIO_PLL(pll, _TGL_DPLL0_CFGCR0, \
_TGL_DPLL1_CFGCR0)
+#define _TGL_DPLL0_DIV0 0x164B00
+#define _TGL_DPLL1_DIV0 0x164C00
+#define TGL_DPLL0_DIV0(pll) _MMIO_PLL(pll, _TGL_DPLL0_DIV0, _TGL_DPLL1_DIV0)
+#define TGL_DPLL0_DIV0_AFC_STARTUP_MASK REG_GENMASK(27, 25)
+#define TGL_DPLL0_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(TGL_DPLL0_DIV0_AFC_STARTUP_MASK, (val))
+#define TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL (0x7)
+
#define _TGL_DPLL0_CFGCR1 0x164288
#define _TGL_DPLL1_CFGCR1 0x164290
#define _TGL_TBTPLL_CFGCR1 0x1642A0
@@ -8033,6 +8040,8 @@ enum skl_power_gate {
/* DEKEL PHY MMIO Address = Phy base + (internal address & ~index_mask) */
#define _DKL_PLL_DIV0 0x200
+#define DKL_PLL_DIV0_AFC_STARTUP_MASK REG_GENMASK(27, 25)
+#define DKL_PLL_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(DKL_PLL_DIV0_AFC_STARTUP_MASK, (val))
#define DKL_PLL_DIV0_INTEG_COEFF(x) ((x) << 16)
#define DKL_PLL_DIV0_INTEG_COEFF_MASK (0x1F << 16)
#define DKL_PLL_DIV0_PROP_COEFF(x) ((x) << 12)
@@ -8042,6 +8051,10 @@ enum skl_power_gate {
#define DKL_PLL_DIV0_FBPREDIV_MASK (0xF << DKL_PLL_DIV0_FBPREDIV_SHIFT)
#define DKL_PLL_DIV0_FBDIV_INT(x) ((x) << 0)
#define DKL_PLL_DIV0_FBDIV_INT_MASK (0xFF << 0)
+#define DKL_PLL_DIV0_MASK (DKL_PLL_DIV0_INTEG_COEFF_MASK | \
+ DKL_PLL_DIV0_PROP_COEFF_MASK | \
+ DKL_PLL_DIV0_FBPREDIV_MASK | \
+ DKL_PLL_DIV0_FBDIV_INT_MASK)
#define DKL_PLL_DIV0(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \
_DKL_PHY2_BASE) + \
_DKL_PLL_DIV0)
--
2.35.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display/tgl+: Implement new PLL programming step
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
@ 2022-02-08 23:50 ` Patchwork
2022-02-08 23:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-08 23:50 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step
URL : https://patchwork.freedesktop.org/series/99867/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2f56199b0301 drm/i915/display/tgl+: Implement new PLL programming step
-:50: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#50: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2753:
+ pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
-:59: WARNING:LONG_LINE: line length of 116 exceeds 100 columns
#59: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2956:
+ pll_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
-:196: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#196: FILE: drivers/gpu/drm/i915/i915_reg.h:7991:
+#define TGL_DPLL0_DIV0(pll) _MMIO_PLL(pll, _TGL_DPLL0_DIV0, _TGL_DPLL1_DIV0)
-:198: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#198: FILE: drivers/gpu/drm/i915/i915_reg.h:7993:
+#define TGL_DPLL0_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(TGL_DPLL0_DIV0_AFC_STARTUP_MASK, (val))
total: 0 errors, 4 warnings, 0 checks, 160 lines checked
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display/tgl+: Implement new PLL programming step
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
2022-02-08 23:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2022-02-08 23:51 ` Patchwork
2022-02-09 0:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-08 23:51 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step
URL : https://patchwork.freedesktop.org/series/99867/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/tgl+: Implement new PLL programming step
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
2022-02-08 23:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-02-08 23:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-02-09 0:20 ` Patchwork
2022-02-09 2:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-09 0:20 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4429 bytes --]
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step
URL : https://patchwork.freedesktop.org/series/99867/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11205 -> Patchwork_22216
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/index.html
Participating hosts (46 -> 43)
------------------------------
Missing (3): fi-bsw-cyan bat-jsl-2 shard-tglu
Known issues
------------
Here are the changes found in Patchwork_22216 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@semaphore:
- fi-hsw-4770: NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#109315]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/fi-hsw-4770/igt@amdgpu/amd_basic@semaphore.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [PASS][2] -> [DMESG-WARN][3] ([i915#4269])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
* igt@runner@aborted:
- fi-bdw-5557u: NOTRUN -> [FAIL][4] ([i915#2426] / [i915#4312])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/fi-bdw-5557u/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-bdw-5557u: [INCOMPLETE][5] ([i915#146]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [INCOMPLETE][7] ([i915#4785]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
#### Warnings ####
* igt@debugfs_test@read_all_entries:
- fi-apl-guc: [DMESG-WARN][9] -> [DMESG-WARN][10] ([i915#1610])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/fi-apl-guc/igt@debugfs_test@read_all_entries.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/fi-apl-guc/igt@debugfs_test@read_all_entries.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-5: [DMESG-FAIL][11] ([i915#4957]) -> [DMESG-FAIL][12] ([i915#4494] / [i915#4957])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
Build changes
-------------
* Linux: CI_DRM_11205 -> Patchwork_22216
CI-20190529: 20190529
CI_DRM_11205: 9999c764a7571bebed03bec481d6fffcb23144fe @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6341: a96674e747ea2f2431bbf8813156adc44ec3162a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22216: 2f56199b030165ee565961de04328d967d0483d9 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2f56199b0301 drm/i915/display/tgl+: Implement new PLL programming step
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/index.html
[-- Attachment #2: Type: text/html, Size: 5206 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display/tgl+: Implement new PLL programming step
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
` (2 preceding siblings ...)
2022-02-09 0:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-02-09 2:01 ` Patchwork
2022-02-09 14:46 ` [Intel-gfx] [PATCH] " Imre Deak
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-09 2:01 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30280 bytes --]
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step
URL : https://patchwork.freedesktop.org/series/99867/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11205_full -> Patchwork_22216_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22216_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22216_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22216_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_mmap_gtt@fault-concurrent-x:
- shard-snb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-snb4/igt@gem_mmap_gtt@fault-concurrent-x.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-snb2/igt@gem_mmap_gtt@fault-concurrent-x.html
* igt@i915_selftest@mock@vma:
- shard-skl: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl7/igt@i915_selftest@mock@vma.html
* igt@syncobj_timeline@invalid-transfer-non-existent-point:
- shard-apl: NOTRUN -> [DMESG-WARN][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@syncobj_timeline@invalid-transfer-non-existent-point.html
- shard-skl: NOTRUN -> [DMESG-WARN][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl8/igt@syncobj_timeline@invalid-transfer-non-existent-point.html
* igt@sysfs_heartbeat_interval@mixed@bcs0:
- shard-skl: [PASS][6] -> [FAIL][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl6/igt@sysfs_heartbeat_interval@mixed@bcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl4/igt@sysfs_heartbeat_interval@mixed@bcs0.html
#### Warnings ####
* igt@i915_pm_dc@dc6-dpms:
- shard-kbl: [FAIL][8] ([i915#454]) -> [INCOMPLETE][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl4/igt@i915_pm_dc@dc6-dpms.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl6/igt@i915_pm_dc@dc6-dpms.html
Known issues
------------
Here are the changes found in Patchwork_22216_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@display-4x:
- shard-tglb: NOTRUN -> [SKIP][10] ([i915#1839])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@feature_discovery@display-4x.html
* igt@gem_eio@in-flight-immediate:
- shard-tglb: [PASS][11] -> [TIMEOUT][12] ([i915#3063])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglb3/igt@gem_eio@in-flight-immediate.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb3/igt@gem_eio@in-flight-immediate.html
* igt@gem_eio@kms:
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#232])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglb6/igt@gem_eio@kms.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb2/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-kbl: NOTRUN -> [DMESG-WARN][15] ([i915#5076])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: NOTRUN -> [FAIL][16] ([i915#2846])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
- shard-skl: NOTRUN -> [FAIL][17] ([i915#2846])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl3/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][18] -> [FAIL][19] ([i915#2842]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][20] -> [FAIL][21] ([i915#2842])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl3/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_lmem_swapping@heavy-multi:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#4613]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@gem_lmem_swapping@heavy-multi.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-skl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#4613])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl7/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_mmap_offset@bad-object:
- shard-skl: [PASS][24] -> [DMESG-WARN][25] ([i915#1982])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl6/igt@gem_mmap_offset@bad-object.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl10/igt@gem_mmap_offset@bad-object.html
* igt@gem_pxp@create-protected-buffer:
- shard-iclb: NOTRUN -> [SKIP][26] ([i915#4270])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@gem_pxp@create-protected-buffer.html
* igt@gem_pxp@fail-invalid-protected-context:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#4270])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@gem_pxp@fail-invalid-protected-context.html
* igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs:
- shard-iclb: NOTRUN -> [SKIP][28] ([i915#768])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-tglb: NOTRUN -> [SKIP][29] ([fdo#109312])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gen9_exec_parse@valid-registers:
- shard-tglb: NOTRUN -> [SKIP][30] ([i915#2527] / [i915#2856])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@gen9_exec_parse@valid-registers.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][31] -> [FAIL][32] ([i915#454])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-iclb7/igt@i915_pm_dc@dc6-psr.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb3/igt@i915_pm_dc@dc6-psr.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [PASS][33] -> [FAIL][34] ([i915#2521])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl4/igt@kms_async_flips@alternate-sync-async-flip.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-skl: NOTRUN -> [FAIL][35] ([i915#3743])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl9/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-kbl: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3777]) +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777]) +3 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl9/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][39] ([fdo#111615])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886]) +2 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][41] ([i915#3689] / [i915#3886])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#3689]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_ccs.html
* igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +4 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][45] ([fdo#109271]) +186 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl7/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium@dp-audio-edid:
- shard-skl: NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +6 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl3/igt@kms_chamelium@dp-audio-edid.html
* igt@kms_chamelium@hdmi-cmp-planar-formats:
- shard-iclb: NOTRUN -> [SKIP][47] ([fdo#109284] / [fdo#111827])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@kms_chamelium@hdmi-cmp-planar-formats.html
* igt@kms_chamelium@hdmi-hpd-for-each-pipe:
- shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +2 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
* igt@kms_chamelium@hdmi-hpd-storm:
- shard-kbl: NOTRUN -> [SKIP][49] ([fdo#109271] / [fdo#111827]) +7 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@kms_chamelium@hdmi-hpd-storm.html
* igt@kms_color_chamelium@pipe-a-ctm-0-75:
- shard-tglb: NOTRUN -> [SKIP][50] ([fdo#109284] / [fdo#111827]) +5 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_color_chamelium@pipe-a-ctm-0-75.html
* igt@kms_content_protection@mei_interface:
- shard-tglb: NOTRUN -> [SKIP][51] ([i915#1063])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_content_protection@mei_interface.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][52] -> [DMESG-WARN][53] ([i915#180])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-b-cursor-32x10-random:
- shard-kbl: NOTRUN -> [SKIP][54] ([fdo#109271]) +60 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html
* igt@kms_cursor_crc@pipe-b-cursor-512x512-rapid-movement:
- shard-tglb: NOTRUN -> [SKIP][55] ([fdo#109279] / [i915#3359]) +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_cursor_crc@pipe-b-cursor-512x512-rapid-movement.html
* igt@kms_cursor_crc@pipe-c-cursor-32x32-random:
- shard-tglb: NOTRUN -> [SKIP][56] ([i915#3319])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_cursor_crc@pipe-c-cursor-32x32-random.html
* igt@kms_flip@2x-absolute-wf_vblank:
- shard-iclb: NOTRUN -> [SKIP][57] ([fdo#109274])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@kms_flip@2x-absolute-wf_vblank.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible:
- shard-tglb: NOTRUN -> [SKIP][58] ([fdo#109274] / [fdo#111825]) +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
- shard-skl: [PASS][59] -> [FAIL][60] ([i915#2122])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-tglb: NOTRUN -> [SKIP][61] ([fdo#109285])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-iclb: NOTRUN -> [SKIP][62] ([fdo#109280]) +1 similar issue
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-cpu:
- shard-tglb: NOTRUN -> [SKIP][63] ([fdo#109280] / [fdo#111825]) +8 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][64] -> [FAIL][65] ([i915#1188]) +1 similar issue
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl10/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@static-toggle:
- shard-tglb: NOTRUN -> [SKIP][66] ([i915#1187])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_hdr@static-toggle.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- shard-apl: [PASS][67] -> [DMESG-WARN][68] ([i915#180]) +2 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-skl: [PASS][69] -> [INCOMPLETE][70] ([i915#4939])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl9/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][72] -> [FAIL][73] ([fdo#108145] / [i915#265]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-d-constant-alpha-max:
- shard-iclb: NOTRUN -> [SKIP][74] ([fdo#109278]) +5 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@kms_plane_alpha_blend@pipe-d-constant-alpha-max.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-tglb: NOTRUN -> [SKIP][75] ([i915#1911])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_sequence@queue-busy:
- shard-skl: [PASS][76] -> [FAIL][77] ([i915#2995])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl9/igt@kms_sequence@queue-busy.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl2/igt@kms_sequence@queue-busy.html
* igt@kms_vrr@flip-dpms:
- shard-tglb: NOTRUN -> [SKIP][78] ([fdo#109502])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_vrr@flip-dpms.html
* igt@kms_writeback@writeback-check-output:
- shard-iclb: NOTRUN -> [SKIP][79] ([i915#2437])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@kms_writeback@writeback-check-output.html
* igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
- shard-apl: NOTRUN -> [SKIP][80] ([fdo#109271]) +29 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html
* igt@perf_pmu@event-wait@rcs0:
- shard-tglb: NOTRUN -> [SKIP][81] ([fdo#112283])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@perf_pmu@event-wait@rcs0.html
* igt@prime_nv_api@nv_i915_import_twice_check_flink_name:
- shard-tglb: NOTRUN -> [SKIP][82] ([fdo#109291])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@prime_nv_api@nv_i915_import_twice_check_flink_name.html
* igt@sysfs_clients@create:
- shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2994]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl3/igt@sysfs_clients@create.html
- shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2994])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl4/igt@sysfs_clients@create.html
* igt@sysfs_heartbeat_interval@mixed@rcs0:
- shard-skl: [PASS][85] -> [WARN][86] ([i915#4055])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl6/igt@sysfs_heartbeat_interval@mixed@rcs0.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl4/igt@sysfs_heartbeat_interval@mixed@rcs0.html
* igt@sysfs_heartbeat_interval@mixed@vcs0:
- shard-skl: [PASS][87] -> [FAIL][88] ([i915#1731])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl6/igt@sysfs_heartbeat_interval@mixed@vcs0.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl4/igt@sysfs_heartbeat_interval@mixed@vcs0.html
#### Possible fixes ####
* igt@gem_eio@in-flight-contexts-immediate:
- shard-tglb: [TIMEOUT][89] ([i915#3063]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglb5/igt@gem_eio@in-flight-contexts-immediate.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb7/igt@gem_eio@in-flight-contexts-immediate.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [FAIL][91] ([i915#2842]) -> [PASS][92] +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl3/igt@gem_exec_fair@basic-none@vcs0.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl6/igt@gem_exec_fair@basic-none@vcs0.html
* igt@i915_selftest@live@gtt:
- shard-skl: [DMESG-FAIL][93] -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-skl3/igt@i915_selftest@live@gtt.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-skl1/igt@i915_selftest@live@gtt.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][95] ([i915#180]) -> [PASS][96] +1 similar issue
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-apl8/igt@i915_suspend@sysfs-reader.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@i915_suspend@sysfs-reader.html
* igt@kms_big_fb@linear-16bpp-rotate-0:
- {shard-tglu}: [DMESG-WARN][97] ([i915#402]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglu-2/igt@kms_big_fb@linear-16bpp-rotate-0.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglu-1/igt@kms_big_fb@linear-16bpp-rotate-0.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-tglb: [INCOMPLETE][99] ([i915#2411] / [i915#2828] / [i915#456]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglb2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-d-cursor-suspend:
- shard-tglb: [DMESG-WARN][101] ([i915#2411] / [i915#2867]) -> [PASS][102] +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglb6/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [INCOMPLETE][103] ([i915#180] / [i915#1982]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2:
- shard-glk: [FAIL][105] ([i915#79]) -> [PASS][106] +1 similar issue
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-glk2/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-glk7/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [DMESG-WARN][107] ([i915#180]) -> [PASS][108] +1 similar issue
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@perf@non-zero-reason:
- shard-glk: [FAIL][109] -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-glk1/igt@perf@non-zero-reason.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-glk9/igt@perf@non-zero-reason.html
* igt@perf_pmu@module-unload:
- shard-tglb: [DMESG-WARN][111] ([i915#262] / [i915#2867]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-tglb6/igt@perf_pmu@module-unload.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-tglb2/igt@perf_pmu@module-unload.html
#### Warnings ####
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [DMESG-WARN][113] ([i915#5076]) -> [SKIP][114] ([i915#4525])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-iclb1/igt@gem_exec_balancer@parallel-bb-first.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [SKIP][115] ([i915#4525]) -> [DMESG-WARN][116] ([i915#5076]) +1 similar issue
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-iclb5/igt@gem_exec_balancer@parallel-keep-submit-fence.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb4/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: [FAIL][117] ([i915#2852]) -> [FAIL][118] ([i915#2842])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-iclb4/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb4/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][119] ([i915#1804] / [i915#2684]) -> [WARN][120] ([i915#2684])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-iclb7/igt@i915_pm_rc6_residency@rc6-fence.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][121] ([i915#2684]) -> [WARN][122] ([i915#1804] / [i915#2684])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127], [FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134], [FAIL][135]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#602]) -> ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#4312])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl6/igt@runner@aborted.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl1/igt@runner@aborted.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl1/igt@runner@aborted.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl1/igt@runner@aborted.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl4/igt@runner@aborted.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl1/igt@runner@aborted.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl1/igt@runner@aborted.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl7/igt@runner@aborted.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl6/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl4/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl6/igt@runner@aborted.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl6/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-kbl4/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl3/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl4/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl6/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl6/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl3/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl4/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl1/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl6/igt@runner@aborted.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/shard-kbl7/igt@runner@aborted.html
- shard-apl: ([FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152], [FAIL][153], [FAIL][154], [FAIL][155]) ([i915#180] / [i915#3002] / [i915#4312]) -> ([FAIL][156], [FAIL][157], [FAIL][158], [FAIL][159], [FAIL][160], [FAIL][161], [FAIL][162]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11205/shard-ap
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22216/index.html
[-- Attachment #2: Type: text/html, Size: 33797 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
` (3 preceding siblings ...)
2022-02-09 2:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-02-09 14:46 ` Imre Deak
2022-02-09 16:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display/tgl+: Implement new PLL programming step (rev2) Patchwork
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Imre Deak @ 2022-02-09 14:46 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
On Tue, Feb 08, 2022 at 01:35:48PM -0800, José Roberto de Souza wrote:
> A new programming step was added to combo and TC PLL sequences.
> If override_AFC_startup is set in VBT, driver should overwrite
> AFC_startup value to 0x7 in PLL's div0 register.
>
> The current understating is that only TGL needs this and all display
> 12 and newer platforms will have a older VBT or a newer VBT with
> override_AFC_startup set to 0 but in any case there is a
> drm_warn_on_once() to let us know if this is not true.
>
> BSpec: 49204
> BSpec: 20122 (pending aproval, check working copies)
> BSpec: 49968
> BSpec: 71360
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 4 ++
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 +++++++++++++------
> drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 6 ++-
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 8 ++++
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 13 +++++++
> 6 files changed, 57 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index aec0efd5350ef..a4134b63f2d49 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -596,6 +596,10 @@ parse_general_features(struct drm_i915_private *i915,
> } else {
> i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
> }
> +
> + if (bdb->version >= 249)
> + i915->vbt.override_afc_startup_bit = general->override_afc_startup_bit;
> +
> drm_dbg_kms(&i915->drm,
> "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
> i915->vbt.int_tv_support,
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 6723c3de5a80c..a60917b926de9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -2748,6 +2748,9 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
> pll_state->cfgcr1 |= TGL_DPLL_CFGCR1_CFSELOVRD_NORMAL_XTAL;
> else
> pll_state->cfgcr1 |= DPLL_CFGCR1_CENTRAL_FREQ_8400;
> +
> + if (i915->vbt.override_afc_startup_bit)
> + pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
> }
>
> static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
> @@ -2949,6 +2952,8 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
> DKL_PLL_DIV0_PROP_COEFF(prop_coeff) |
> DKL_PLL_DIV0_FBPREDIV(m1div) |
> DKL_PLL_DIV0_FBDIV_INT(m2div_int);
> + if (dev_priv->vbt.override_afc_startup_bit)
> + pll_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
>
> pll_state->mg_pll_div1 = DKL_PLL_DIV1_IREF_TRIM(iref_trim) |
> DKL_PLL_DIV1_TDC_TARGET_CNT(tdc_targetcnt);
> @@ -3448,10 +3453,10 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *dev_priv,
> MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO_MASK;
>
> hw_state->mg_pll_div0 = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port));
> - hw_state->mg_pll_div0 &= (DKL_PLL_DIV0_INTEG_COEFF_MASK |
> - DKL_PLL_DIV0_PROP_COEFF_MASK |
> - DKL_PLL_DIV0_FBPREDIV_MASK |
> - DKL_PLL_DIV0_FBDIV_INT_MASK);
> + val = DKL_PLL_DIV0_MASK;
> + if (dev_priv->vbt.override_afc_startup_bit)
> + val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
> + hw_state->mg_pll_div0 &= val;
>
> hw_state->mg_pll_div1 = intel_de_read(dev_priv, DKL_PLL_DIV1(tc_port));
> hw_state->mg_pll_div1 &= (DKL_PLL_DIV1_IREF_TRIM_MASK |
> @@ -3513,6 +3518,10 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv,
> TGL_DPLL_CFGCR0(id));
> hw_state->cfgcr1 = intel_de_read(dev_priv,
> TGL_DPLL_CFGCR1(id));
> + if (dev_priv->vbt.override_afc_startup_bit) {
> + hw_state->div0 = intel_de_read(dev_priv, TGL_DPLL0_DIV0(id));
> + hw_state->div0 &= TGL_DPLL0_DIV0_AFC_STARTUP_MASK;
> + }
> } else {
> if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) {
> hw_state->cfgcr0 = intel_de_read(dev_priv,
> @@ -3554,7 +3563,7 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
> {
> struct intel_dpll_hw_state *hw_state = &pll->state.hw_state;
> const enum intel_dpll_id id = pll->info->id;
> - i915_reg_t cfgcr0_reg, cfgcr1_reg;
> + i915_reg_t cfgcr0_reg, cfgcr1_reg, div0_reg = INVALID_MMIO_REG;
>
> if (IS_ALDERLAKE_S(dev_priv)) {
> cfgcr0_reg = ADLS_DPLL_CFGCR0(id);
> @@ -3568,6 +3577,7 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
> } else if (DISPLAY_VER(dev_priv) >= 12) {
> cfgcr0_reg = TGL_DPLL_CFGCR0(id);
> cfgcr1_reg = TGL_DPLL_CFGCR1(id);
> + div0_reg = TGL_DPLL0_DIV0(id);
> } else {
> if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) {
> cfgcr0_reg = ICL_DPLL_CFGCR0(4);
> @@ -3580,6 +3590,12 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
>
> intel_de_write(dev_priv, cfgcr0_reg, hw_state->cfgcr0);
> intel_de_write(dev_priv, cfgcr1_reg, hw_state->cfgcr1);
> + drm_WARN_ON_ONCE(&dev_priv->drm, dev_priv->vbt.override_afc_startup_bit &&
> + !i915_mmio_reg_valid(div0_reg));
> + if (dev_priv->vbt.override_afc_startup_bit &&
> + i915_mmio_reg_valid(div0_reg))
Could be simplified to if (override_bit && !warn(!reg_valid))
> + intel_de_rmw(dev_priv, div0_reg, TGL_DPLL0_DIV0_AFC_STARTUP_MASK,
> + hw_state->div0);
> intel_de_posting_read(dev_priv, cfgcr1_reg);
> }
>
> @@ -3667,13 +3683,11 @@ static void dkl_pll_write(struct drm_i915_private *dev_priv,
> val |= hw_state->mg_clktop2_hsclkctl;
> intel_de_write(dev_priv, DKL_CLKTOP2_HSCLKCTL(tc_port), val);
>
> - val = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port));
> - val &= ~(DKL_PLL_DIV0_INTEG_COEFF_MASK |
> - DKL_PLL_DIV0_PROP_COEFF_MASK |
> - DKL_PLL_DIV0_FBPREDIV_MASK |
> - DKL_PLL_DIV0_FBDIV_INT_MASK);
> - val |= hw_state->mg_pll_div0;
> - intel_de_write(dev_priv, DKL_PLL_DIV0(tc_port), val);
> + val = DKL_PLL_DIV0_MASK;
> + if (dev_priv->vbt.override_afc_startup_bit)
> + val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
> + intel_de_rmw(dev_priv, DKL_PLL_DIV0(tc_port), val,
> + hw_state->mg_pll_div0);
>
> val = intel_de_read(dev_priv, DKL_PLL_DIV1(tc_port));
> val &= ~(DKL_PLL_DIV1_IREF_TRIM_MASK |
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index 91fe181462b2e..4125d7ab54438 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -218,7 +218,11 @@ struct intel_dpll_hw_state {
> u32 mg_refclkin_ctl;
> u32 mg_clktop2_coreclkctl1;
> u32 mg_clktop2_hsclkctl;
> - u32 mg_pll_div0;
> + /* tgl+ */
> + union {
> + u32 div0;
> + u32 mg_pll_div0;
> + };
Imo, all the different overlapping pll states should be in some union;
for now I'd just add div0 for tgl (intel_pipe_config_compare() would
also need to be updated then).
> u32 mg_pll_div1;
> u32 mg_pll_lf;
> u32 mg_pll_frac_lock;
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index a39d6cfea87aa..a813ebedcae81 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -162,6 +162,14 @@ struct bdb_general_features {
> u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
> u8 dp_ssc_dongle_supported:1;
> u8 rsvd11:2; /* finish byte */
> +
> + /* byte 6 */
Following the above comments this would be called "bits 6".
> + u8 tc_hpd_retry_timeout:7; /* 242 */
> + u8 rsvd12:1;
> +
> + /* byte 7 */
> + u8 override_afc_startup_bit:1;/* 249 */
> + u8 rsvd13:7;
> } __packed;
>
> /*
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8c1706fd81f9e..c04312a8dd520 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -532,6 +532,7 @@ struct intel_vbt_data {
> int lvds_ssc_freq;
> unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
> enum drm_panel_orientation orientation;
> + bool override_afc_startup_bit;
>
> enum drrs_support_type drrs_type;
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 87c92314ee269..d51bdc1105037 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7986,6 +7986,13 @@ enum skl_power_gate {
> #define RKL_DPLL_CFGCR0(pll) _MMIO_PLL(pll, _TGL_DPLL0_CFGCR0, \
> _TGL_DPLL1_CFGCR0)
>
> +#define _TGL_DPLL0_DIV0 0x164B00
> +#define _TGL_DPLL1_DIV0 0x164C00
> +#define TGL_DPLL0_DIV0(pll) _MMIO_PLL(pll, _TGL_DPLL0_DIV0, _TGL_DPLL1_DIV0)
> +#define TGL_DPLL0_DIV0_AFC_STARTUP_MASK REG_GENMASK(27, 25)
> +#define TGL_DPLL0_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(TGL_DPLL0_DIV0_AFC_STARTUP_MASK, (val))
> +#define TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL (0x7)
The parens are not needed and the flag could be named after the value
it encodes, so AFC_STARTUP_383.
Regardless of the above nits, the patch looks ok:
Reviewed-by: Imre Deak <imre.deak@intel.com>
> +
> #define _TGL_DPLL0_CFGCR1 0x164288
> #define _TGL_DPLL1_CFGCR1 0x164290
> #define _TGL_TBTPLL_CFGCR1 0x1642A0
> @@ -8033,6 +8040,8 @@ enum skl_power_gate {
>
> /* DEKEL PHY MMIO Address = Phy base + (internal address & ~index_mask) */
> #define _DKL_PLL_DIV0 0x200
> +#define DKL_PLL_DIV0_AFC_STARTUP_MASK REG_GENMASK(27, 25)
> +#define DKL_PLL_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(DKL_PLL_DIV0_AFC_STARTUP_MASK, (val))
> #define DKL_PLL_DIV0_INTEG_COEFF(x) ((x) << 16)
> #define DKL_PLL_DIV0_INTEG_COEFF_MASK (0x1F << 16)
> #define DKL_PLL_DIV0_PROP_COEFF(x) ((x) << 12)
> @@ -8042,6 +8051,10 @@ enum skl_power_gate {
> #define DKL_PLL_DIV0_FBPREDIV_MASK (0xF << DKL_PLL_DIV0_FBPREDIV_SHIFT)
> #define DKL_PLL_DIV0_FBDIV_INT(x) ((x) << 0)
> #define DKL_PLL_DIV0_FBDIV_INT_MASK (0xFF << 0)
> +#define DKL_PLL_DIV0_MASK (DKL_PLL_DIV0_INTEG_COEFF_MASK | \
> + DKL_PLL_DIV0_PROP_COEFF_MASK | \
> + DKL_PLL_DIV0_FBPREDIV_MASK | \
> + DKL_PLL_DIV0_FBDIV_INT_MASK)
> #define DKL_PLL_DIV0(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \
> _DKL_PHY2_BASE) + \
> _DKL_PLL_DIV0)
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display/tgl+: Implement new PLL programming step (rev2)
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
` (4 preceding siblings ...)
2022-02-09 14:46 ` [Intel-gfx] [PATCH] " Imre Deak
@ 2022-02-09 16:22 ` Patchwork
2022-02-09 16:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-09 16:22 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step (rev2)
URL : https://patchwork.freedesktop.org/series/99867/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1dc3174e835d drm/i915/display/tgl+: Implement new PLL programming step
-:51: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#51: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2753:
+ pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
-:60: WARNING:LONG_LINE: line length of 116 exceeds 100 columns
#60: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2956:
+ pll_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
-:197: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#197: FILE: drivers/gpu/drm/i915/i915_reg.h:7991:
+#define TGL_DPLL0_DIV0(pll) _MMIO_PLL(pll, _TGL_DPLL0_DIV0, _TGL_DPLL1_DIV0)
-:199: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#199: FILE: drivers/gpu/drm/i915/i915_reg.h:7993:
+#define TGL_DPLL0_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(TGL_DPLL0_DIV0_AFC_STARTUP_MASK, (val))
total: 0 errors, 4 warnings, 0 checks, 160 lines checked
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display/tgl+: Implement new PLL programming step (rev2)
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
` (5 preceding siblings ...)
2022-02-09 16:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display/tgl+: Implement new PLL programming step (rev2) Patchwork
@ 2022-02-09 16:23 ` Patchwork
2022-02-09 16:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-09 16:23 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step (rev2)
URL : https://patchwork.freedesktop.org/series/99867/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/tgl+: Implement new PLL programming step (rev2)
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
` (6 preceding siblings ...)
2022-02-09 16:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-02-09 16:50 ` Patchwork
2022-02-09 20:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-10 10:55 ` [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step Jani Nikula
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-09 16:50 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 2755 bytes --]
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step (rev2)
URL : https://patchwork.freedesktop.org/series/99867/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11207 -> Patchwork_22225
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/index.html
Participating hosts (45 -> 43)
------------------------------
Additional (1): bat-rpls-1
Missing (3): fi-bsw-cyan shard-tglu fi-pnv-d510
Known issues
------------
Here are the changes found in Patchwork_22225 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-bdw-5557u: [PASS][1] -> [INCOMPLETE][2] ([i915#146])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@prime_vgem@basic-userptr:
- fi-skl-6600u: NOTRUN -> [SKIP][3] ([fdo#109271]) +18 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/fi-skl-6600u/igt@prime_vgem@basic-userptr.html
#### Possible fixes ####
* igt@kms_psr@primary_page_flip:
- fi-skl-6600u: [FAIL][4] ([i915#4547]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4898]: https://gitlab.freedesktop.org/drm/intel/issues/4898
Build changes
-------------
* Linux: CI_DRM_11207 -> Patchwork_22225
CI-20190529: 20190529
CI_DRM_11207: 0d650d738ee924dc0c367ff1f33c61237a635933 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6342: 1bd167a3af9e8f6168ac89c64c64b929694d9be7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22225: 1dc3174e835d6804c413bbf18264c2e42c7202c7 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1dc3174e835d drm/i915/display/tgl+: Implement new PLL programming step
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/index.html
[-- Attachment #2: Type: text/html, Size: 3291 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display/tgl+: Implement new PLL programming step (rev2)
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
` (7 preceding siblings ...)
2022-02-09 16:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-02-09 20:03 ` Patchwork
2022-02-10 10:55 ` [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step Jani Nikula
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-09 20:03 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30287 bytes --]
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step (rev2)
URL : https://patchwork.freedesktop.org/series/99867/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11207_full -> Patchwork_22225_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22225_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22225_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22225_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_softpin@noreloc-s3:
- shard-snb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-snb4/igt@gem_softpin@noreloc-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-snb6/igt@gem_softpin@noreloc-s3.html
* igt@kms_scaling_modes@scaling-mode-full-aspect@edp-1-pipe-c:
- shard-tglb: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-tglb1/igt@kms_scaling_modes@scaling-mode-full-aspect@edp-1-pipe-c.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb8/igt@kms_scaling_modes@scaling-mode-full-aspect@edp-1-pipe-c.html
Known issues
------------
Here are the changes found in Patchwork_22225_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@psr2:
- shard-iclb: NOTRUN -> [SKIP][5] ([i915#658])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@feature_discovery@psr2.html
* igt@gem_eio@in-flight-1us:
- shard-skl: [PASS][6] -> [TIMEOUT][7] ([i915#3063])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl3/igt@gem_eio@in-flight-1us.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl8/igt@gem_eio@in-flight-1us.html
* igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: NOTRUN -> [DMESG-WARN][8] ([i915#5076])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@gem_exec_balancer@parallel-contexts.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: NOTRUN -> [SKIP][9] ([i915#4525])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_capture@pi@bcs0:
- shard-tglb: [PASS][10] -> [INCOMPLETE][11] ([i915#3371] / [i915#3731])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-tglb5/igt@gem_exec_capture@pi@bcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb6/igt@gem_exec_capture@pi@bcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2849])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_fence@invalid-timeline-fence-array:
- shard-skl: [PASS][17] -> [DMESG-WARN][18] ([i915#1982])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl7/igt@gem_exec_fence@invalid-timeline-fence-array.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@gem_exec_fence@invalid-timeline-fence-array.html
* igt@gem_exec_whisper@basic-contexts:
- shard-glk: [PASS][19] -> [DMESG-WARN][20] ([i915#118])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk7/igt@gem_exec_whisper@basic-contexts.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-glk3/igt@gem_exec_whisper@basic-contexts.html
* igt@gem_lmem_swapping@heavy-random:
- shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#4613])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl7/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@smem-oom:
- shard-iclb: NOTRUN -> [SKIP][23] ([i915#4613])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_lmem_swapping@verify:
- shard-skl: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#4613])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@gem_lmem_swapping@verify.html
* igt@gem_pread@exhaustion:
- shard-tglb: NOTRUN -> [WARN][25] ([i915#2658])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@gem_pread@exhaustion.html
* igt@gem_pwrite@basic-exhaustion:
- shard-iclb: NOTRUN -> [WARN][26] ([i915#2658])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-iclb: NOTRUN -> [SKIP][27] ([i915#4270]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_render_copy@yf-tiled-to-vebox-y-tiled:
- shard-iclb: NOTRUN -> [SKIP][28] ([i915#768])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@gem_render_copy@yf-tiled-to-vebox-y-tiled.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-iclb: NOTRUN -> [SKIP][29] ([i915#3297])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gem_userptr_blits@vma-merge:
- shard-skl: NOTRUN -> [FAIL][30] ([i915#3318])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@gem_userptr_blits@vma-merge.html
* igt@gem_workarounds@suspend-resume-context:
- shard-skl: [PASS][31] -> [INCOMPLETE][32] ([i915#4798] / [i915#4939])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl3/igt@gem_workarounds@suspend-resume-context.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl8/igt@gem_workarounds@suspend-resume-context.html
* igt@gen3_render_linear_blits:
- shard-iclb: NOTRUN -> [SKIP][33] ([fdo#109289])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@gen3_render_linear_blits.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: [PASS][34] -> [DMESG-WARN][35] ([i915#1436] / [i915#716])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl4/igt@gen9_exec_parse@allowed-all.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl8/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@bb-start-out:
- shard-iclb: NOTRUN -> [SKIP][36] ([i915#2856])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@gen9_exec_parse@bb-start-out.html
* igt@i915_pm_dc@dc9-dpms:
- shard-iclb: [PASS][37] -> [SKIP][38] ([i915#4281])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb6/igt@i915_pm_dc@dc9-dpms.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][39] -> [INCOMPLETE][40] ([i915#3921])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-snb7/igt@i915_selftest@live@hangcheck.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-snb7/igt@i915_selftest@live@hangcheck.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-iclb: NOTRUN -> [SKIP][41] ([i915#1769])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][42] ([fdo#110725] / [fdo#111614]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-skl: NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3777]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][44] ([i915#3743])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
- shard-iclb: NOTRUN -> [SKIP][45] ([fdo#110723])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglb: NOTRUN -> [SKIP][46] ([fdo#111615])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-kbl: NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3777])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#3886])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl7/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#3886]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#3886]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-iclb: NOTRUN -> [SKIP][51] ([fdo#109278] / [i915#3886]) +3 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-iclb: NOTRUN -> [SKIP][52] ([fdo#109278]) +17 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-hpd-enable-disable-mode:
- shard-tglb: NOTRUN -> [SKIP][53] ([fdo#109284] / [fdo#111827]) +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@kms_chamelium@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium@vga-hpd-for-each-pipe:
- shard-skl: NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +3 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@kms_chamelium@vga-hpd-for-each-pipe.html
* igt@kms_chamelium@vga-hpd-with-enabled-mode:
- shard-iclb: NOTRUN -> [SKIP][55] ([fdo#109284] / [fdo#111827]) +5 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_chamelium@vga-hpd-with-enabled-mode.html
* igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
- shard-kbl: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) +3 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html
* igt@kms_color_chamelium@pipe-c-ctm-negative:
- shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl7/igt@kms_color_chamelium@pipe-c-ctm-negative.html
* igt@kms_color_chamelium@pipe-d-ctm-blue-to-red:
- shard-iclb: NOTRUN -> [SKIP][58] ([fdo#109278] / [fdo#109284] / [fdo#111827])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_color_chamelium@pipe-d-ctm-blue-to-red.html
* igt@kms_content_protection@content_type_change:
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109300] / [fdo#111066])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_content_protection@content_type_change.html
* igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding:
- shard-iclb: NOTRUN -> [SKIP][60] ([fdo#109278] / [fdo#109279]) +2 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][61] -> [DMESG-WARN][62] ([i915#180]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-sliding:
- shard-kbl: NOTRUN -> [SKIP][63] ([fdo#109271]) +30 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@kms_cursor_crc@pipe-d-cursor-256x256-sliding.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-iclb: NOTRUN -> [SKIP][64] ([fdo#109274] / [fdo#109278]) +3 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-tglb: NOTRUN -> [SKIP][65] ([fdo#109274] / [fdo#111825])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [PASS][66] -> [FAIL][67] ([i915#2346])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109274]) +2 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][69] -> [FAIL][70] ([i915#79]) +1 similar issue
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-apl: [PASS][71] -> [DMESG-WARN][72] ([i915#180]) +4 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip@flip-vs-suspend@b-dp1:
- shard-apl: NOTRUN -> [DMESG-WARN][73] ([i915#180])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl3/igt@kms_flip@flip-vs-suspend@b-dp1.html
* igt@kms_flip@plain-flip-fb-recreate@c-edp1:
- shard-skl: [PASS][74] -> [FAIL][75] ([i915#2122]) +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl6/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl9/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-glk: [PASS][76] -> [FAIL][77] ([i915#4911])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt:
- shard-tglb: NOTRUN -> [SKIP][78] ([fdo#109280] / [fdo#111825]) +2 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-iclb: NOTRUN -> [SKIP][79] ([fdo#109280]) +9 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_hdr@static-swap:
- shard-iclb: NOTRUN -> [SKIP][80] ([i915#1187])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@kms_hdr@static-swap.html
* igt@kms_hdr@static-toggle-suspend:
- shard-tglb: NOTRUN -> [SKIP][81] ([i915#1187])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
- shard-kbl: NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#533])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#658])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-iclb: NOTRUN -> [SKIP][85] ([fdo#109642] / [fdo#111068] / [i915#658])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: NOTRUN -> [SKIP][86] ([fdo#109441])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@kms_psr@psr2_cursor_render.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [PASS][87] -> [SKIP][88] ([fdo#109441]) +2 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb1/igt@kms_psr@psr2_no_drrs.html
* igt@kms_vblank@pipe-d-query-idle-hang:
- shard-skl: NOTRUN -> [SKIP][89] ([fdo#109271]) +32 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@kms_vblank@pipe-d-query-idle-hang.html
* igt@kms_vblank@pipe-d-ts-continuation-idle:
- shard-apl: NOTRUN -> [SKIP][90] ([fdo#109271]) +27 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl7/igt@kms_vblank@pipe-d-ts-continuation-idle.html
* igt@kms_vrr@flip-dpms:
- shard-iclb: NOTRUN -> [SKIP][91] ([fdo#109502]) +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@kms_vrr@flip-dpms.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-skl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2437])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl2/igt@kms_writeback@writeback-pixel-formats.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-tglb: NOTRUN -> [SKIP][93] ([i915#2530]) +1 similar issue
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-tglb: NOTRUN -> [SKIP][94] ([fdo#109289])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb1/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@perf@polling-small-buf:
- shard-skl: [PASS][95] -> [FAIL][96] ([i915#1722])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl3/igt@perf@polling-small-buf.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl8/igt@perf@polling-small-buf.html
* igt@perf_pmu@module-unload:
- shard-iclb: [PASS][97] -> [INCOMPLETE][98] ([i915#1373] / [i915#262])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb1/igt@perf_pmu@module-unload.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@perf_pmu@module-unload.html
* igt@prime_nv_api@i915_nv_import_twice:
- shard-tglb: NOTRUN -> [SKIP][99] ([fdo#109291])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb5/igt@prime_nv_api@i915_nv_import_twice.html
* igt@prime_nv_pcopy@test3_4:
- shard-iclb: NOTRUN -> [SKIP][100] ([fdo#109291]) +1 similar issue
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@prime_nv_pcopy@test3_4.html
* igt@syncobj_timeline@invalid-transfer-non-existent-point:
- shard-iclb: NOTRUN -> [DMESG-WARN][101] ([i915#5084])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@syncobj_timeline@invalid-transfer-non-existent-point.html
* igt@sysfs_clients@pidname:
- shard-iclb: NOTRUN -> [SKIP][102] ([i915#2994])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@sysfs_clients@pidname.html
#### Possible fixes ####
* igt@gem_exec_capture@pi@vcs0:
- shard-iclb: [INCOMPLETE][103] ([i915#3371]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb1/igt@gem_exec_capture@pi@vcs0.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@gem_exec_capture@pi@vcs0.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][105] ([i915#2842]) -> [PASS][106] +1 similar issue
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [FAIL][107] ([i915#2842]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-tglb: [FAIL][109] ([i915#2849]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-tglb3/igt@gem_exec_fair@basic-throttle@rcs0.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-tglb7/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_parallel@contexts@rcs0:
- shard-iclb: [INCOMPLETE][111] ([i915#1895]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb8/igt@gem_exec_parallel@contexts@rcs0.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb3/igt@gem_exec_parallel@contexts@rcs0.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [FAIL][113] ([i915#644]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [DMESG-WARN][115] ([i915#180]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl6/igt@gem_workarounds@suspend-resume-context.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl7/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-kbl: [DMESG-WARN][117] ([i915#180]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl6/igt@i915_suspend@fence-restore-tiled2untiled.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-kbl4/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-glk: [DMESG-WARN][119] ([i915#118]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-glk9/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [INCOMPLETE][121] ([i915#180]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@plain-flip-fb-recreate@b-edp1:
- shard-skl: [FAIL][123] ([i915#2122]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl6/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl9/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
- shard-iclb: [SKIP][125] ([i915#3701]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite:
- shard-skl: [DMESG-WARN][127] ([i915#1982]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl9/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl3/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [FAIL][129] ([fdo#108145] / [i915#265]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_scaling@plane-scaling@pipe-a-plane-scaling:
- shard-glk: [DMESG-WARN][131] ([i915#118] / [i915#1888]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk1/igt@kms_plane_scaling@plane-scaling@pipe-a-plane-scaling.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-glk7/igt@kms_plane_scaling@plane-scaling@pipe-a-plane-scaling.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][133] ([fdo#109441]) -> [PASS][134] +2 similar issues
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb7/igt@kms_psr@psr2_sprite_plane_move.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
#### Warnings ####
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [SKIP][135] ([i915#4525]) -> [DMESG-WARN][136] ([i915#5076])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb6/igt@gem_exec_balancer@parallel-bb-first.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/shard-iclb4/igt@gem_exec_balancer@parallel-bb-firs
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22225/index.html
[-- Attachment #2: Type: text/html, Size: 33581 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step
2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
` (8 preceding siblings ...)
2022-02-09 20:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-02-10 10:55 ` Jani Nikula
9 siblings, 0 replies; 11+ messages in thread
From: Jani Nikula @ 2022-02-10 10:55 UTC (permalink / raw)
To: José Roberto de Souza, intel-gfx
On Tue, 08 Feb 2022, José Roberto de Souza <jose.souza@intel.com> wrote:
> A new programming step was added to combo and TC PLL sequences.
> If override_AFC_startup is set in VBT, driver should overwrite
> AFC_startup value to 0x7 in PLL's div0 register.
>
> The current understating is that only TGL needs this and all display
> 12 and newer platforms will have a older VBT or a newer VBT with
> override_AFC_startup set to 0 but in any case there is a
> drm_warn_on_once() to let us know if this is not true.
>
> BSpec: 49204
> BSpec: 20122 (pending aproval, check working copies)
> BSpec: 49968
> BSpec: 71360
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 4 ++
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 +++++++++++++------
> drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 6 ++-
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 8 ++++
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 13 +++++++
> 6 files changed, 57 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index aec0efd5350ef..a4134b63f2d49 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -596,6 +596,10 @@ parse_general_features(struct drm_i915_private *i915,
> } else {
> i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
> }
> +
> + if (bdb->version >= 249)
> + i915->vbt.override_afc_startup_bit = general->override_afc_startup_bit;
Please drop _bit suffix for single bits. No need to duplicate VBT
idiosyncrasies in kernel.
BR,
Jani.
> +
> drm_dbg_kms(&i915->drm,
> "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
> i915->vbt.int_tv_support,
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 6723c3de5a80c..a60917b926de9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -2748,6 +2748,9 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
> pll_state->cfgcr1 |= TGL_DPLL_CFGCR1_CFSELOVRD_NORMAL_XTAL;
> else
> pll_state->cfgcr1 |= DPLL_CFGCR1_CENTRAL_FREQ_8400;
> +
> + if (i915->vbt.override_afc_startup_bit)
> + pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
> }
>
> static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
> @@ -2949,6 +2952,8 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
> DKL_PLL_DIV0_PROP_COEFF(prop_coeff) |
> DKL_PLL_DIV0_FBPREDIV(m1div) |
> DKL_PLL_DIV0_FBDIV_INT(m2div_int);
> + if (dev_priv->vbt.override_afc_startup_bit)
> + pll_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL);
>
> pll_state->mg_pll_div1 = DKL_PLL_DIV1_IREF_TRIM(iref_trim) |
> DKL_PLL_DIV1_TDC_TARGET_CNT(tdc_targetcnt);
> @@ -3448,10 +3453,10 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *dev_priv,
> MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO_MASK;
>
> hw_state->mg_pll_div0 = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port));
> - hw_state->mg_pll_div0 &= (DKL_PLL_DIV0_INTEG_COEFF_MASK |
> - DKL_PLL_DIV0_PROP_COEFF_MASK |
> - DKL_PLL_DIV0_FBPREDIV_MASK |
> - DKL_PLL_DIV0_FBDIV_INT_MASK);
> + val = DKL_PLL_DIV0_MASK;
> + if (dev_priv->vbt.override_afc_startup_bit)
> + val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
> + hw_state->mg_pll_div0 &= val;
>
> hw_state->mg_pll_div1 = intel_de_read(dev_priv, DKL_PLL_DIV1(tc_port));
> hw_state->mg_pll_div1 &= (DKL_PLL_DIV1_IREF_TRIM_MASK |
> @@ -3513,6 +3518,10 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv,
> TGL_DPLL_CFGCR0(id));
> hw_state->cfgcr1 = intel_de_read(dev_priv,
> TGL_DPLL_CFGCR1(id));
> + if (dev_priv->vbt.override_afc_startup_bit) {
> + hw_state->div0 = intel_de_read(dev_priv, TGL_DPLL0_DIV0(id));
> + hw_state->div0 &= TGL_DPLL0_DIV0_AFC_STARTUP_MASK;
> + }
> } else {
> if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) {
> hw_state->cfgcr0 = intel_de_read(dev_priv,
> @@ -3554,7 +3563,7 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
> {
> struct intel_dpll_hw_state *hw_state = &pll->state.hw_state;
> const enum intel_dpll_id id = pll->info->id;
> - i915_reg_t cfgcr0_reg, cfgcr1_reg;
> + i915_reg_t cfgcr0_reg, cfgcr1_reg, div0_reg = INVALID_MMIO_REG;
>
> if (IS_ALDERLAKE_S(dev_priv)) {
> cfgcr0_reg = ADLS_DPLL_CFGCR0(id);
> @@ -3568,6 +3577,7 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
> } else if (DISPLAY_VER(dev_priv) >= 12) {
> cfgcr0_reg = TGL_DPLL_CFGCR0(id);
> cfgcr1_reg = TGL_DPLL_CFGCR1(id);
> + div0_reg = TGL_DPLL0_DIV0(id);
> } else {
> if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) {
> cfgcr0_reg = ICL_DPLL_CFGCR0(4);
> @@ -3580,6 +3590,12 @@ static void icl_dpll_write(struct drm_i915_private *dev_priv,
>
> intel_de_write(dev_priv, cfgcr0_reg, hw_state->cfgcr0);
> intel_de_write(dev_priv, cfgcr1_reg, hw_state->cfgcr1);
> + drm_WARN_ON_ONCE(&dev_priv->drm, dev_priv->vbt.override_afc_startup_bit &&
> + !i915_mmio_reg_valid(div0_reg));
> + if (dev_priv->vbt.override_afc_startup_bit &&
> + i915_mmio_reg_valid(div0_reg))
> + intel_de_rmw(dev_priv, div0_reg, TGL_DPLL0_DIV0_AFC_STARTUP_MASK,
> + hw_state->div0);
> intel_de_posting_read(dev_priv, cfgcr1_reg);
> }
>
> @@ -3667,13 +3683,11 @@ static void dkl_pll_write(struct drm_i915_private *dev_priv,
> val |= hw_state->mg_clktop2_hsclkctl;
> intel_de_write(dev_priv, DKL_CLKTOP2_HSCLKCTL(tc_port), val);
>
> - val = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port));
> - val &= ~(DKL_PLL_DIV0_INTEG_COEFF_MASK |
> - DKL_PLL_DIV0_PROP_COEFF_MASK |
> - DKL_PLL_DIV0_FBPREDIV_MASK |
> - DKL_PLL_DIV0_FBDIV_INT_MASK);
> - val |= hw_state->mg_pll_div0;
> - intel_de_write(dev_priv, DKL_PLL_DIV0(tc_port), val);
> + val = DKL_PLL_DIV0_MASK;
> + if (dev_priv->vbt.override_afc_startup_bit)
> + val |= DKL_PLL_DIV0_AFC_STARTUP_MASK;
> + intel_de_rmw(dev_priv, DKL_PLL_DIV0(tc_port), val,
> + hw_state->mg_pll_div0);
>
> val = intel_de_read(dev_priv, DKL_PLL_DIV1(tc_port));
> val &= ~(DKL_PLL_DIV1_IREF_TRIM_MASK |
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index 91fe181462b2e..4125d7ab54438 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -218,7 +218,11 @@ struct intel_dpll_hw_state {
> u32 mg_refclkin_ctl;
> u32 mg_clktop2_coreclkctl1;
> u32 mg_clktop2_hsclkctl;
> - u32 mg_pll_div0;
> + /* tgl+ */
> + union {
> + u32 div0;
> + u32 mg_pll_div0;
> + };
> u32 mg_pll_div1;
> u32 mg_pll_lf;
> u32 mg_pll_frac_lock;
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index a39d6cfea87aa..a813ebedcae81 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -162,6 +162,14 @@ struct bdb_general_features {
> u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
> u8 dp_ssc_dongle_supported:1;
> u8 rsvd11:2; /* finish byte */
> +
> + /* byte 6 */
> + u8 tc_hpd_retry_timeout:7; /* 242 */
> + u8 rsvd12:1;
> +
> + /* byte 7 */
> + u8 override_afc_startup_bit:1;/* 249 */
> + u8 rsvd13:7;
> } __packed;
>
> /*
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8c1706fd81f9e..c04312a8dd520 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -532,6 +532,7 @@ struct intel_vbt_data {
> int lvds_ssc_freq;
> unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
> enum drm_panel_orientation orientation;
> + bool override_afc_startup_bit;
>
> enum drrs_support_type drrs_type;
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 87c92314ee269..d51bdc1105037 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7986,6 +7986,13 @@ enum skl_power_gate {
> #define RKL_DPLL_CFGCR0(pll) _MMIO_PLL(pll, _TGL_DPLL0_CFGCR0, \
> _TGL_DPLL1_CFGCR0)
>
> +#define _TGL_DPLL0_DIV0 0x164B00
> +#define _TGL_DPLL1_DIV0 0x164C00
> +#define TGL_DPLL0_DIV0(pll) _MMIO_PLL(pll, _TGL_DPLL0_DIV0, _TGL_DPLL1_DIV0)
> +#define TGL_DPLL0_DIV0_AFC_STARTUP_MASK REG_GENMASK(27, 25)
> +#define TGL_DPLL0_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(TGL_DPLL0_DIV0_AFC_STARTUP_MASK, (val))
> +#define TGL_DPLL0_DIV0_AFC_STARTUP_OVERRIDE_VAL (0x7)
> +
> #define _TGL_DPLL0_CFGCR1 0x164288
> #define _TGL_DPLL1_CFGCR1 0x164290
> #define _TGL_TBTPLL_CFGCR1 0x1642A0
> @@ -8033,6 +8040,8 @@ enum skl_power_gate {
>
> /* DEKEL PHY MMIO Address = Phy base + (internal address & ~index_mask) */
> #define _DKL_PLL_DIV0 0x200
> +#define DKL_PLL_DIV0_AFC_STARTUP_MASK REG_GENMASK(27, 25)
> +#define DKL_PLL_DIV0_AFC_STARTUP(val) REG_FIELD_PREP(DKL_PLL_DIV0_AFC_STARTUP_MASK, (val))
> #define DKL_PLL_DIV0_INTEG_COEFF(x) ((x) << 16)
> #define DKL_PLL_DIV0_INTEG_COEFF_MASK (0x1F << 16)
> #define DKL_PLL_DIV0_PROP_COEFF(x) ((x) << 12)
> @@ -8042,6 +8051,10 @@ enum skl_power_gate {
> #define DKL_PLL_DIV0_FBPREDIV_MASK (0xF << DKL_PLL_DIV0_FBPREDIV_SHIFT)
> #define DKL_PLL_DIV0_FBDIV_INT(x) ((x) << 0)
> #define DKL_PLL_DIV0_FBDIV_INT_MASK (0xFF << 0)
> +#define DKL_PLL_DIV0_MASK (DKL_PLL_DIV0_INTEG_COEFF_MASK | \
> + DKL_PLL_DIV0_PROP_COEFF_MASK | \
> + DKL_PLL_DIV0_FBPREDIV_MASK | \
> + DKL_PLL_DIV0_FBDIV_INT_MASK)
> #define DKL_PLL_DIV0(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \
> _DKL_PHY2_BASE) + \
> _DKL_PLL_DIV0)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 11+ messages in thread
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2022-02-08 21:35 [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step José Roberto de Souza
2022-02-08 23:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-02-08 23:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-09 0:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-09 2:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-09 14:46 ` [Intel-gfx] [PATCH] " Imre Deak
2022-02-09 16:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display/tgl+: Implement new PLL programming step (rev2) Patchwork
2022-02-09 16:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-09 16:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-09 20:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-10 10:55 ` [Intel-gfx] [PATCH] drm/i915/display/tgl+: Implement new PLL programming step Jani Nikula
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